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Public Member Functions | Static Public Attributes | Private Member Functions | Private Attributes | List of all members
llvm::LLVMTCEScheduler Class Reference

#include <LLVMTCEScheduler.hh>

Inheritance diagram for llvm::LLVMTCEScheduler:
Inheritance graph
Collaboration diagram for llvm::LLVMTCEScheduler:
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Public Member Functions

 LLVMTCEScheduler ()
 
virtual ~LLVMTCEScheduler ()
 
virtual bool runOnMachineFunction (MachineFunction &MF)
 

Static Public Attributes

static char ID = 0
 

Private Member Functions

virtual bool doInitialization (Module &m)
 

Private Attributes

TTAMachine::MachinetceMachine_
 
LLVMTCEIRBuildertceIRBuilder_
 
InterPassDatainterPassData_
 
llvm::Module * mod_
 

Detailed Description

Definition at line 47 of file LLVMTCEScheduler.hh.

Constructor & Destructor Documentation

◆ LLVMTCEScheduler()

llvm::LLVMTCEScheduler::LLVMTCEScheduler ( )

Definition at line 79 of file LLVMTCEScheduler.cc.

79 :
80 MachineFunctionPass(ID), tceIRBuilder_(NULL), interPassData_(NULL) {
81 try {
83 } catch (const Exception& e) {
85 << "TCE: unable to load the ADF:" << std::endl
86 << e.errorMessage() << std::endl;
87 }
88 // By default Application::cmdLineOptions returns NULL.
89 // If we want to pass dump-ddg options we need to create new one.
90 // Add also -O3 flag, otherwise the -O0 is used and Sequential Scheduler
91 // called.
93 std::vector<std::string> args;
94 args.push_back("llc");
95 args.push_back("-O3");
96 if (DumpDDG) {
97 args.push_back("--dump-ddgs-dot");
98 args.push_back("--dump-ddgs-xml");
99 } else if (DumpDDGDot) {
100 args.push_back("--dump-ddgs-dot");
101 } else if (DumpDDGXML) {
102 args.push_back("--dump-ddgs-xml");
103 }
104 if (DisableLLVMAA) {
105 args.push_back("--disable-llvmaa");
106 }
107 try {
108 options->parse(args);
110 } catch (const IllegalCommandLine& e) {
111 std::cerr << e.errorMessageStack() << std::endl;
112 }
113}
static MachInfoCmdLineOptions options
Definition MachInfo.cc:46
static void setCmdLineOptions(CmdLineOptions *options_)
static std::ostream & logStream()
void parse(char *argv[], int argc)
std::string errorMessageStack(bool messagesOnly=false) const
Definition Exception.cc:138
std::string errorMessage() const
Definition Exception.cc:123
static Machine * loadFromADF(const std::string &adfFileName)
Definition Machine.cc:899
LLVMTCEIRBuilder * tceIRBuilder_
InterPassData * interPassData_
TTAMachine::Machine * tceMachine_
static cl::opt< bool > DumpDDGDot("dump-ddgs-dot", cl::desc("Write out Data Dependence Graph of processed procedures in dot format."))
static cl::opt< bool > DumpDDGXML("dump-ddgs-xml", cl::desc("Write out Data Dependence Graph of processed procedures in XML format."))
static cl::opt< bool > DisableLLVMAA("disable-llvmaa", cl::desc("Disables use of LLVM Alias Analysis information."))
static cl::opt< std::string > ADFLocation("adf", cl::desc("The TCE architecture definition file."), cl::init(""), cl::Hidden)
static cl::opt< bool > DumpDDG("dump-ddgs", cl::desc("Equivalent to --dump-ddgs-dot --dump-ddgs-xml."))

References llvm::ADFLocation(), llvm::DisableLLVMAA(), llvm::DumpDDG(), llvm::DumpDDGDot(), llvm::DumpDDGXML(), Exception::errorMessage(), Exception::errorMessageStack(), TTAMachine::Machine::loadFromADF(), Application::logStream(), options, CmdLineOptions::parse(), Application::setCmdLineOptions(), and tceMachine_.

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◆ ~LLVMTCEScheduler()

virtual llvm::LLVMTCEScheduler::~LLVMTCEScheduler ( )
inlinevirtual

Definition at line 51 of file LLVMTCEScheduler.hh.

51{}

Member Function Documentation

◆ doInitialization()

bool llvm::LLVMTCEScheduler::doInitialization ( Module &  m)
privatevirtual

Definition at line 116 of file LLVMTCEScheduler.cc.

116 {
117 mod_ = &m;
118 return false;
119}

References mod_.

◆ runOnMachineFunction()

bool llvm::LLVMTCEScheduler::runOnMachineFunction ( MachineFunction &  MF)
virtual

Definition at line 121 of file LLVMTCEScheduler.cc.

121 {
123 MF.getTarget().getSubtargetImpl(MF.getFunction())->getInstrInfo());
124
125 AliasAnalysis* AA = nullptr;
126 AAResultsWrapperPass* AARWPass =
127 getAnalysisIfAvailable<AAResultsWrapperPass>();
128 if (AARWPass)
129 AA = &AARWPass->getAAResults();
130
131 if (tceIRBuilder_ == NULL) {
133 tceIRBuilder_ = new LLVMTCEIRBuilder(
134 MF.getTarget(), tceMachine_, *interPassData_, AA, true, true);
136 }
138 return false;
139}
static void setLLVMTargetInstrInfo(const llvm::MCInstrInfo *tid)
bool writeMachineFunction(MachineFunction &mf)
virtual bool doInitialization(Module &m)
AAResults AliasAnalysis

References llvm::LLVMTCEIRBuilder::doInitialization(), interPassData_, mod_, OperationPool::setLLVMTargetInstrInfo(), tceIRBuilder_, tceMachine_, and llvm::LLVMTCEIRBuilder::writeMachineFunction().

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Member Data Documentation

◆ ID

char llvm::LLVMTCEScheduler::ID = 0
static

Definition at line 49 of file LLVMTCEScheduler.hh.

◆ interPassData_

InterPassData* llvm::LLVMTCEScheduler::interPassData_
private

Definition at line 57 of file LLVMTCEScheduler.hh.

Referenced by runOnMachineFunction().

◆ mod_

llvm::Module* llvm::LLVMTCEScheduler::mod_
private

Definition at line 58 of file LLVMTCEScheduler.hh.

Referenced by doInitialization(), and runOnMachineFunction().

◆ tceIRBuilder_

LLVMTCEIRBuilder* llvm::LLVMTCEScheduler::tceIRBuilder_
private

Definition at line 56 of file LLVMTCEScheduler.hh.

Referenced by runOnMachineFunction().

◆ tceMachine_

TTAMachine::Machine* llvm::LLVMTCEScheduler::tceMachine_
private

Definition at line 55 of file LLVMTCEScheduler.hh.

Referenced by LLVMTCEScheduler(), and runOnMachineFunction().


The documentation for this class was generated from the following files: