OpenASIP 2.2
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LLVMTCEScheduler.cc
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1/*
2 Copyright (c) 2011 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24/**
25 * @file LLVMTCEScheduler.cc
26 *
27 * Wrapper for TCE scheduler to be called from LLVM codegen.
28 *
29 * @author Pekka Jääskeläinen 2011
30 * @note rating: red
31 */
32
33#include "CompilerWarnings.hh"
34
35IGNORE_COMPILER_WARNING("-Wunused-parameter")
36
37#include <llvm/CodeGen/MachineFunction.h>
38#include "tce_config.h"
39#include <llvm/IR/Function.h>
40#include <llvm/Support/CommandLine.h>
41#include <llvm/Analysis/AliasAnalysis.h>
42
43#include <iostream>
44
45#include "LLVMTCEScheduler.hh"
46#include "Application.hh"
47#include "InterPassData.hh"
49#include "OperationPool.hh"
50
52
53namespace llvm {
54
55static cl::opt<std::string>
57 "adf",
58 cl::desc("The TCE architecture definition file."),
59 cl::init(""), cl::Hidden);
60static cl::opt<bool>
62 "disable-llvmaa",
63 cl::desc("Disables use of LLVM Alias Analysis information."));
64static cl::opt<bool>
66 "dump-ddgs",
67 cl::desc("Equivalent to --dump-ddgs-dot --dump-ddgs-xml."));
68static cl::opt<bool>
70 "dump-ddgs-dot",
71 cl::desc("Write out Data Dependence Graph of processed procedures in dot format."));
72static cl::opt<bool>
74 "dump-ddgs-xml",
75 cl::desc("Write out Data Dependence Graph of processed procedures in XML format."));
76
78
80 MachineFunctionPass(ID), tceIRBuilder_(NULL), interPassData_(NULL) {
81 try {
83 } catch (const Exception& e) {
85 << "TCE: unable to load the ADF:" << std::endl
86 << e.errorMessage() << std::endl;
87 }
88 // By default Application::cmdLineOptions returns NULL.
89 // If we want to pass dump-ddg options we need to create new one.
90 // Add also -O3 flag, otherwise the -O0 is used and Sequential Scheduler
91 // called.
93 std::vector<std::string> args;
94 args.push_back("llc");
95 args.push_back("-O3");
96 if (DumpDDG) {
97 args.push_back("--dump-ddgs-dot");
98 args.push_back("--dump-ddgs-xml");
99 } else if (DumpDDGDot) {
100 args.push_back("--dump-ddgs-dot");
101 } else if (DumpDDGXML) {
102 args.push_back("--dump-ddgs-xml");
103 }
104 if (DisableLLVMAA) {
105 args.push_back("--disable-llvmaa");
106 }
107 try {
108 options->parse(args);
110 } catch (const IllegalCommandLine& e) {
111 std::cerr << e.errorMessageStack() << std::endl;
112 }
113}
114
115bool
117 mod_ = &m;
118 return false;
119}
120bool
123 MF.getTarget().getSubtargetImpl(MF.getFunction())->getInstrInfo());
124
125 AliasAnalysis* AA = nullptr;
126 AAResultsWrapperPass* AARWPass =
127 getAnalysisIfAvailable<AAResultsWrapperPass>();
128 if (AARWPass)
129 AA = &AARWPass->getAAResults();
130
131 if (tceIRBuilder_ == NULL) {
134 MF.getTarget(), tceMachine_, *interPassData_, AA, true, true);
136 }
138 return false;
139}
140
141FunctionPass*
142createTCESchedulerPass(const char* /*target*/) {
143 if (ADFLocation == "") {
145 << "TCE: you need to provide the ADF location via llc -adf switch!"
146 << std::endl;
147 return NULL;
148 }
149 return new LLVMTCEScheduler();
150}
151
152}
#define IGNORE_COMPILER_WARNING(X)
#define POP_COMPILER_DIAGS
static MachInfoCmdLineOptions options
Definition MachInfo.cc:46
static void setCmdLineOptions(CmdLineOptions *options_)
static std::ostream & logStream()
void parse(char *argv[], int argc)
std::string errorMessageStack(bool messagesOnly=false) const
Definition Exception.cc:138
std::string errorMessage() const
Definition Exception.cc:123
static void setLLVMTargetInstrInfo(const llvm::MCInstrInfo *tid)
static Machine * loadFromADF(const std::string &adfFileName)
Definition Machine.cc:899
bool writeMachineFunction(MachineFunction &mf)
virtual bool doInitialization(Module &m)
LLVMTCEIRBuilder * tceIRBuilder_
InterPassData * interPassData_
virtual bool doInitialization(Module &m)
virtual bool runOnMachineFunction(MachineFunction &MF)
TTAMachine::Machine * tceMachine_
static cl::opt< bool > DumpDDGDot("dump-ddgs-dot", cl::desc("Write out Data Dependence Graph of processed procedures in dot format."))
static cl::opt< bool > DumpDDGXML("dump-ddgs-xml", cl::desc("Write out Data Dependence Graph of processed procedures in XML format."))
static cl::opt< bool > DisableLLVMAA("disable-llvmaa", cl::desc("Disables use of LLVM Alias Analysis information."))
static cl::opt< std::string > ADFLocation("adf", cl::desc("The TCE architecture definition file."), cl::init(""), cl::Hidden)
FunctionPass * createTCESchedulerPass(const char *)
AAResults AliasAnalysis
static cl::opt< bool > DumpDDG("dump-ddgs", cl::desc("Equivalent to --dump-ddgs-dot --dump-ddgs-xml."))