SOPCBuilderFileGenerator.cc

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/*
    Copyright (c) 2002-2010 Tampere University.
 
    This file is part of TTA-Based Codesign Environment (TCE).
 
    Permission is hereby granted, free of charge, to any person obtaining a
    copy of this software and associated documentation files (the "Software"),
    to deal in the Software without restriction, including without limitation
    the rights to use, copy, modify, merge, publish, distribute, sublicense,
    and/or sell copies of the Software, and to permit persons to whom the
    Software is furnished to do so, subject to the following conditions:
 
    The above copyright notice and this permission notice shall be included in
    all copies or substantial portions of the Software.
 
    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
    THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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/**
 * @file SOPCBuilderFileGenerator.cc
 *
 * Implementation of SOPCBuilderFileGenerator class.
 *
 * @author Otto Esko 2010 (otto.esko-no.spam-tut.fi)
 * @note rating: red
 */
 
#include <fstream>
#include <cassert>
#include "SOPCBuilderFileGenerator.hh"
#include "PlatformIntegrator.hh"
#include "NetlistBlock.hh"
#include "NetlistPort.hh"
#include "Exception.hh"
#include "FileSystem.hh"
#include "AvalonMMMasterInterface.hh"
#include "MapTools.hh"
using std::ofstream;
using std::vector;
using std::map;
using std::endl;
 
 
const TCEString SOPCBuilderFileGenerator::HDB_AVALON_PREFIX = "avalon_d_";
const TCEString SOPCBuilderFileGenerator::SOPC_COMPONENT_FILE_TYPE =
    "_hw.tcl";
const TCEString SOPCBuilderFileGenerator::SOPC_SET_MODULE_PROPERTY =
    "set_module_property";
const TCEString SOPCBuilderFileGenerator::SOPC_ADD_FILE =
    "add_file";
const TCEString SOPCBuilderFileGenerator::TTA_CLOCK_NAME = "clk";
const TCEString SOPCBuilderFileGenerator::TTA_RESET_NAME = "rstx";
const TCEString SOPCBuilderFileGenerator::SOPC_CLOCK_NAME = "clk";
const TCEString SOPCBuilderFileGenerator::SOPC_RESET_NAME = "reset_n";
const TCEString SOPCBuilderFileGenerator::SOPC_DEFAULT_GROUP = "User Logic";
const TCEString SOPCBuilderFileGenerator::SOPC_DEFAULT_VHDL_LIBS = 
    "std.standard.all ieee.std_logic_1164.all ieee.std_logic_arith.all "
    "work.globals.all work.util.all work.imem_mau.all";
const TCEString SOPCBuilderFileGenerator::PI_DEVICE_FAMILY_GENERIC =
    "dev_family_g";
 
 
 
 
SOPCBuilderFileGenerator::SOPCBuilderFileGenerator(
    TCEString toplevelEntity,
    const PlatformIntegrator* integrator):
    ProjectFileGenerator(toplevelEntity, integrator),
    clock_(new SOPCInterface(
               SOPCInterface::SOPC_CLOCK_INT_NAME,
               SOPCInterface::SOPC_CLOCK_INT_DECLR)),
    export_(new SOPCInterface(
                SOPCInterface::SOPC_EXPORT_INT_NAME,
                SOPCInterface::SOPC_EXPORT_INT_DECLR)) {
    
    clock_->setProperty("ptfSchematicName", "\"\"");
    clock_->setPort(TTA_CLOCK_NAME, SOPC_CLOCK_NAME, ProGe::IN, 1);
    clock_->setPort(TTA_RESET_NAME, SOPC_RESET_NAME, ProGe::IN, 1);
 
    export_->setProperty(
        SOPCInterface::SOPC_ASSOCIATED_CLOCK, clock_->name());
}
 
 
SOPCBuilderFileGenerator::~SOPCBuilderFileGenerator() {
    
    if (clock_ != NULL) {
        delete clock_;
    }
    if (export_ != NULL) {
        delete export_;
    }
    MapTools::deleteAllValues(masters_);
}
 
 
void
SOPCBuilderFileGenerator::writeProjectFiles() {
    
    int masterInterfaces = countAvalonMMMasters();
    if (masterInterfaces == 0) {
        TCEString msg = "Couldn't find any Avalon MM Master interfaces.";
        InvalidData exc(__FILE__, __LINE__, "SOPCBuilderFileGenerator", msg);
        throw exc;
    }
 
    createInterfaces();
 
    TCEString outputFileName = toplevelEntity() + SOPC_COMPONENT_FILE_TYPE;
    ofstream output;
    output.open(outputFileName.c_str());
    if (!output) {
        TCEString msg = 
            "Couldn't open file " + outputFileName + " for writing";
        IOException exc(__FILE__, __LINE__, "SOPCBuilderFileGenerator", msg);
        throw exc;
    }
    
    output << "# Generated by SOPCBuilderGenerator" << endl << endl;
    writeModuleProperties(output);
 
    writeGenerics(output);
 
    writeFileList(output);
 
    writeInterfaces(output);
 
    output.close();
}
 
 
/**
 * Counts how many Avalon MM Master interfaces toplevel netlis block has.
 *
 * Avalon MM interface is recognised by the address port. Address signal in
 * first of the 2 mandatory signals in Avalon MM interface. Direction of the
 * address port determines whether it belongs to a master or slave interface.
 *
 * @return Number of found Avalon MM Master interfaces
 */
int
SOPCBuilderFileGenerator::countAvalonMMMasters() const {
    
    const ProGe::NetlistBlock& top = integrator()->toplevelBlock();
    TCEString addressPortName =
        HDB_AVALON_PREFIX + AvalonMMMasterInterface::AVALON_MM_ADDRESS;
    int found = 0;
    for (size_t i = 0; i < top.portCount(); i++) {
        TCEString portName = top.port(i).name();
        if (portName.find(addressPortName) != TCEString::npos) {
            if (top.port(i).direction() == ProGe::OUT) {
                found++;
            }
        }
    }
    return found;
}
 
 
void
SOPCBuilderFileGenerator::writeModuleProperties(std::ostream& stream) {
 
    TCEString property = SOPC_SET_MODULE_PROPERTY;
    stream 
        << "# Module properties" << endl
        << property << " NAME " << toplevelEntity() << endl
        << property << " VERSION 1.0" << endl
        << property << " GROUP \"" << SOPC_DEFAULT_GROUP << "\"" << endl
        << property << " DISPLAY_NAME " << toplevelEntity() << endl
        << property << " LIBRARIES {" << SOPC_DEFAULT_VHDL_LIBS;
 
    if (integrator()->toplevelBlock().netlist().parameterCount() > 0) {
        stream << " work." << toplevelEntity() << "_params.all";
    }
    stream << "}" << endl;
 
    TCEString toplevelFile =
        integrator()->outputFilePath(toplevelEntity() + ".vhdl");
    stream
        << property << " TOP_LEVEL_HDL_FILE " << toplevelFile << endl
        << property << " TOP_LEVEL_HDL_MODULE " << toplevelEntity() << endl
        << property << " INSTANTIATE_IN_SYSTEM_MODULE true" << endl
        << property << " EDITABLE false" << endl
        << property << " SIMULATION_MODEL_IN_VERILOG false" << endl
        << property << " SIMULATION_MODEL_IN_VHDL false" << endl
        << property << " SIMULATION_MODEL_HAS_TULIPS false" << endl
        << property << " SIMULATION_MODEL_IS_OBFUSCATED false" << endl
        << endl;
}
 
 
void
SOPCBuilderFileGenerator::writeGenerics(std::ostream& stream) {
 
    const ProGe::NetlistBlock& top = integrator()->toplevelBlock();
    if (top.parameterCount() == 0) {
        return;
    }
    stream << "# toplevel parameters" << endl;
    for (size_t i = 0; i < top.parameterCount(); i++) {
        TCEString line;
        line << "add_parameter " << top.parameter(i).name() << " ";
        if (top.parameter(i).type().lower() == "string") {
            line << "STRING ";
            if (!top.parameter(i).value().startsWith("\"")) line << "\"";
            line << top.parameter(i).value();
            if (!top.parameter(i).value().endsWith("\"")) line << "\"";
        } else if (top.parameter(i).type().lower() == "integer") {
            line << "INTEGER " << top.parameter(i).value();
        } else {
            // unknown type, ignore
            continue;
        }
        stream << line << endl;
        if (top.parameter(i).name().lower() == PI_DEVICE_FAMILY_GENERIC) {
            stream << "set_parameter_property " << PI_DEVICE_FAMILY_GENERIC
                   << " DISPLAY_NAME \"Device family (change if necessary)\""
                   << endl;
        }
    }
    stream << endl;
}
 
void
SOPCBuilderFileGenerator::writeFileList(std::ostream& stream) {
 
    stream << "# module hdl files" << endl;
    for (unsigned int i = 0; i < hdlFileList().size(); i++) {
        stream << SOPC_ADD_FILE << " " << hdlFileList().at(i)
               << " {SYNTHESIS SIMULATION}" << endl;
    }
    for (unsigned int i = 0; i < memInitFileList().size(); i++) {
        stream << SOPC_ADD_FILE << " " << memInitFileList().at(i)
               << " {SYNTHESIS SIMULATION}" << endl;
    }
    stream << endl;
}
 
 
void
SOPCBuilderFileGenerator::createInterfaces() {
 
    const ProGe::NetlistBlock& top = integrator()->toplevelBlock();
    for (size_t i = 0; i < top.portCount(); i++) {
        TCEString portName = top.port(i).name();
 
        bool needToExport = true;
        if (portName == TTA_CLOCK_NAME || portName == TTA_RESET_NAME) {
            continue;
        } else if (portName.find(HDB_AVALON_PREFIX) != TCEString::npos) {
            needToExport = !handleAvalonSignal(top.port(i));
        }
 
        if (needToExport) {
            exportSignal(top.port(i));
        }
    }
}
 
 
bool
SOPCBuilderFileGenerator::handleAvalonSignal(
    const ProGe::NetlistPort& port) {
 
    TCEString fuName = extractFUName(port.name(), HDB_AVALON_PREFIX);
 
    if (fuName.empty()) {
        TCEString msg = "Failed to extract FU name from: " + port.name();
        InvalidData exc(__FILE__, __LINE__, "SOPCBuilderFileGenerator", msg);
        throw exc;
    }
    
    if (!MapTools::containsKey(masters_ ,fuName)) {
        TCEString interfaceName = 
            fuName + SOPCInterface::SOPC_MASTER_INT_NAME;
        TCEString declr = SOPCInterface::SOPC_MASTER_INT_DECLR;
        masters_[fuName] = new AvalonMMMasterInterface(
            interfaceName, declr, HDB_AVALON_PREFIX, *clock_);
    }
 
    AvalonMMMasterInterface* master = getMaster(fuName);
    bool isAvalonPort = false;
    if (!master->isValidPort(port)) {
        isAvalonPort = false;
    } else {
        master->addPort(port);
        isAvalonPort = true;
    }
    return isAvalonPort;
}
 
 
void
SOPCBuilderFileGenerator::exportSignal(const ProGe::NetlistPort& port) {
 
    int width = 32;
    if (port.realWidthAvailable()) {
        width = port.realWidth();
    }
    TCEString intPortName = SOPCInterface::SOPC_EXPORT_NAME;
    export_->setPort(port.name(), intPortName, port.direction(), width);
}
 
 
void
SOPCBuilderFileGenerator::writeInterfaces(std::ostream& stream) const {
 
    clock_->writeInterface(stream);
 
    std::map<TCEString, AvalonMMMasterInterface*>::const_iterator iter =
        masters_.begin();
    while (iter != masters_.end()) {
        AvalonMMMasterInterface* master = iter->second;
        if (master->hasPorts()) {
            master->writeInterface(stream);
        }
        iter++;
    }
    if (export_->hasPorts()) {
        export_->writeInterface(stream);
    }
}
 
 
 
 
 
AvalonMMMasterInterface*
SOPCBuilderFileGenerator::getMaster(const TCEString& fuName) {
 
    std::map<TCEString, AvalonMMMasterInterface*>::iterator iter =
        masters_.find(fuName);
 
    assert(iter != masters_.end());
    return iter->second;
}