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OpenASIP 2.2
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#include <AlteraHibiDpRamGenerator.hh>


Public Member Functions | |
| AlteraHibiDpRamGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
| virtual | ~AlteraHibiDpRamGenerator () |
| virtual bool | generatesComponentHdlFile () const |
| virtual std::vector< TCEString > | generateComponentFile (TCEString outputPath) |
Public Member Functions inherited from AlteraMemGenerator | |
| AlteraMemGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
| virtual | ~AlteraMemGenerator () |
| virtual void | addMemory (const ProGe::NetlistBlock &ttaCore, ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
Public Member Functions inherited from MemoryGenerator | |
| MemoryGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
| virtual | ~MemoryGenerator () |
| virtual bool | isCompatible (const ProGe::NetlistBlock &ttaCore, int coreId, std::vector< TCEString > &reasons) const |
| int | memoryTotalWidth () const |
| int | memoryMauSize () const |
| int | memoryWidthInMaus () const |
| int | memoryAddrWidth () const |
| TCEString | initializationFile () const |
| void | addLsu (TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts) |
Protected Member Functions | |
| virtual bool | checkFuPort (const std::string fuPort, std::vector< TCEString > &reasons) const |
| virtual void | connectPorts (ProGe::NetlistBlock &netlistBlock, const ProGe::NetlistPort &memPort, const ProGe::NetlistPort &corePort, bool inverted, int coreId) |
| virtual TCEString | moduleName () const |
| virtual TCEString | instanceName (int coreId, int memIndex) const |
Protected Member Functions inherited from AlteraMemGenerator | |
| std::vector< TCEString > | instantiateAlteraTemplate (const TCEString &templateFile, const TCEString &outputPath) const |
| virtual void | addGenerics (ProGe::NetlistBlock &topBlock, const TCEString &addrWidth, const TCEString &dataWidth, int memIndex) |
Protected Member Functions inherited from MemoryGenerator | |
| virtual MemoryGenerator::BlockPair | createMemoryNetlistBlock (ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
| const PlatformIntegrator * | platformIntegrator () const |
| std::ostream & | warningStream () |
| std::ostream & | errorStream () |
| int | portCount () const |
| const HDLPort * | port (int index) const |
| const HDLPort * | portByKeyName (TCEString name) const |
| TCEString | portKeyName (const HDLPort *port) const |
| void | addPort (const TCEString &name, HDLPort *port) |
| int | parameterCount () const |
| const ProGe::Parameter & | parameter (int index) const |
| void | addParameter (const ProGe::Parameter &add) |
| TCEString | ttaCoreName () const |
| TCEString | memoryIndexString (int coreId, int memIndex) const |
| TCEString | templatePath () const |
| void | instantiateTemplate (const TCEString &inFile, const TCEString &outFile, const TCEString &entity) const |
| bool | hasLSUArchitecture () const |
| const TTAMachine::FunctionUnit & | lsuArchitecture () const |
| TCEString | corePortName (const TCEString &portBaseName, int coreId) const |
Static Private Attributes | |
| static const TCEString | COMPONENT_FILE |
Additional Inherited Members | |
Protected Types inherited from MemoryGenerator | |
| typedef std::multimap< TCEString, HDLPort * > | PortMap |
| typedef std::pair< ProGe::NetlistBlock *, ProGe::VirtualNetlistBlock * > | BlockPair |
Static Protected Attributes inherited from AlteraMemGenerator | |
| static const TCEString | INIT_FILE_G = "init_file_g" |
| static const TCEString | DEV_FAMILY_G = "dev_family_g" |
| static const TCEString | ADDRW_G = "addrw_g" |
| static const TCEString | DATAW_G = "dataw_g" |
Definition at line 43 of file AlteraHibiDpRamGenerator.hh.
| AlteraHibiDpRamGenerator::AlteraHibiDpRamGenerator | ( | int | memMauWidth, |
| int | widthInMaus, | ||
| int | addrWidth, | ||
| TCEString | initFile, | ||
| const PlatformIntegrator * | integrator, | ||
| std::ostream & | warningStream, | ||
| std::ostream & | errorStream | ||
| ) |
Definition at line 52 of file AlteraHibiDpRamGenerator.cc.
References MemoryGenerator::addPort(), AlteraMemGenerator::ADDRW_G, ProGe::BIT, ProGe::BIT_VECTOR, AlteraMemGenerator::DATAW_G, ProGe::IN, MemoryGenerator::memoryAddrWidth(), MemoryGenerator::memoryTotalWidth(), MemoryGenerator::memoryWidthInMaus(), and ProGe::OUT.

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virtual |
Definition at line 108 of file AlteraHibiDpRamGenerator.cc.
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protectedvirtual |
Reimplemented from MemoryGenerator.
Definition at line 113 of file AlteraHibiDpRamGenerator.cc.
References MemoryGenerator::checkFuPort().

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protectedvirtual |
Reimplemented from MemoryGenerator.
Definition at line 127 of file AlteraHibiDpRamGenerator.cc.
References ProGe::Netlist::connect(), MemoryGenerator::connectPorts(), MemoryGenerator::memoryAddrWidth(), ProGe::NetlistPort::name(), and ProGe::NetlistBlock::netlist().

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virtual |
Implements MemoryGenerator.
Definition at line 151 of file AlteraHibiDpRamGenerator.cc.
References COMPONENT_FILE, and AlteraMemGenerator::instantiateAlteraTemplate().

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virtual |
Implements MemoryGenerator.
Definition at line 145 of file AlteraHibiDpRamGenerator.cc.
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protectedvirtual |
Implements MemoryGenerator.
Definition at line 165 of file AlteraHibiDpRamGenerator.cc.
References MemoryGenerator::memoryIndexString().

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protectedvirtual |
Implements MemoryGenerator.
Definition at line 158 of file AlteraHibiDpRamGenerator.cc.
References MemoryGenerator::ttaCoreName().

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staticprivate |
Definition at line 81 of file AlteraHibiDpRamGenerator.hh.
Referenced by generateComponentFile().