Inheritance diagram for llvm::GeneratedTCEPlugin:

Collaboration diagram for llvm::GeneratedTCEPlugin:

Public Member Functions
	GeneratedTCEPlugin ()

virtual	~GeneratedTCEPlugin ()

virtual const TargetInstrInfo *	getInstrInfo () const override

virtual const TargetRegisterInfo *	getRegisterInfo () const override

virtual const TargetFrameLowering *	getFrameLowering () const override

virtual TargetLowering *	getTargetLowering () const override

virtual TargetTransformInfo	getTargetTransformInfo (const Function &F) const override

virtual const TargetSubtargetInfo *	getSubtarget () const override

virtual FunctionPass *	createISelPass (TCETargetMachine *tm) override

virtual unsigned	spDRegNum () override
	Returns ID number of the stack pointer register.

virtual unsigned	fpDRegNum () override
	Returns ID number of the frame pointer register.

virtual unsigned	rvDRegNum () override

virtual unsigned	rvHighDRegNum () override

virtual std::vector< unsigned >	getParamDRegNums () const override

virtual std::vector< unsigned >	getVectorRVDRegNums () const override

virtual MVT::SimpleValueType	getDefaultType () const override

virtual std::string	rfName (unsigned dwarfRegNum) override

virtual unsigned	registerIndex (unsigned dwarfRegNum) override

unsigned	llvmRegisterId (const TCEString &ttaRegister) override

unsigned int	extractElementLane (const llvm::MachineInstr &) const override

virtual std::string	operationName (unsigned opc) const override

virtual bool	validStackAccessOperation (const std::string &opName) const override
	Returns true if OSAL operation is valid for stack accesses.

virtual bool	hasOperation (TCEString operationName) const override
	Returns true in case the target supports the given osal operation.

virtual unsigned	opcode (TCEString operationName) const override
	Returns the opcode for the given osal operation, undefined if not found.

virtual int	getTruePredicateOpcode (unsigned opc) const override

virtual int	getFalsePredicateOpcode (unsigned opc) const override

unsigned int	raPortDRegNum () override
	Returns ID number of the return address register.

std::string	dataASName () override
	Returns name of the data address space.

virtual bool	hasSDIV () const override

virtual bool	hasUDIV () const override

virtual bool	hasSREM () const override

virtual bool	hasUREM () const override

virtual bool	hasMUL () const override

virtual bool	hasROTL () const override

virtual bool	hasROTR () const override

virtual bool	hasSXHW () const override

virtual bool	hasSXQW () const override

virtual bool	hasSQRTF () const override

virtual bool	hasSHR () const override

virtual bool	hasSHL () const override

virtual bool	hasSHRU () const override

virtual bool	has8bitLoads () const override

virtual bool	has16bitLoads () const override

virtual int	maxVectorSize () const override

virtual bool	analyzeCCBranch (llvm::MachineInstr &i, llvm::SmallVectorImpl< llvm::MachineOperand > &cond) const override

virtual void	registerTargetMachine (TCETargetMachine &tm) override
	Plugin needs target machine for TragetLowering generation.

virtual int	getLoad (const TargetRegisterClass *rc) const override

virtual int	getStore (const TargetRegisterClass *rc) const override

virtual int	getMinOpcode (llvm::SDNode *n) const override

virtual int	getMaxOpcode (llvm::SDNode *n) const override

virtual int	getMinuOpcode (llvm::SDNode *n) const override

virtual int	getMaxuOpcode (llvm::SDNode *n) const override

virtual const llvm::TargetRegisterClass *	extrasRegClass (const llvm::TargetRegisterClass *current) const override

virtual const llvm::TargetRegisterClass *	nodeRegClass (unsigned nodeId, const llvm::TargetRegisterClass *current) const override

virtual int	getLoadOpcode (const EVT &vt) const override

virtual int	getAddOpcode (const EVT &vt) const override

virtual int	getShlOpcode (const EVT &vt) const override

virtual int	getIorOpcode (const EVT &vt) const override

virtual bool	isLittleEndian () const override

virtual bool	is64bit () const override

virtual bool	canMaterializeConstant (const ConstantInt &ci) const override

virtual std::tuple< int, int >	getPointerAdjustment (int offset) const override

virtual void	manualInitialize ()

Public Member Functions inherited from llvm::TCETargetMachinePlugin
	TCETargetMachinePlugin ()

virtual	~TCETargetMachinePlugin ()

virtual unsigned int	extractElementLane (const MachineInstr &mi) const =0

virtual int	getLoadOpcode (const llvm::EVT &vt) const =0

virtual int	getAddOpcode (const llvm::EVT &vt) const =0

virtual int	getShlOpcode (const llvm::EVT &vt) const =0

virtual int	getIorOpcode (const llvm::EVT &vt) const =0

virtual const DataLayout *	getDataLayout () const

virtual DataLayout *	getDataLayout ()

virtual TCETargetMachine *	getCurrentTargetMachine ()

virtual const TCETargetMachine *	getCurrentTargetMachine () const

virtual const SelectionDAGTargetInfo *	getSelectionDAGInfo () const

Private Member Functions
void	initialize ()

Private Attributes
std::map< unsigned, TCEString >	opNames_

std::map< unsigned, unsigned >	truePredOps_

std::map< unsigned, unsigned >	falsePredOps_

std::map< unsigned, TCEString >	regNames_

std::map< unsigned, unsigned >	regIndices_

std::map< TCEString, unsigned >	ttallvmRegMap_
	Map for TTA register to LLVM register id conversion.

TCETools::CIStringSet	validStackAccessOperations_
	Set of valid LLVM opcodes for stack accesses.

std::string	dataASName_

Additional Inherited Members
Protected Attributes inherited from llvm::TCETargetMachinePlugin
TCEInstrInfo *	instrInfo_
	Target machine instruction info for the llvm framework.

TargetLowering *	lowering_

TargetFrameLowering *	frameInfo_

TCETargetMachine *	tm_

TCESubtarget *	subTarget_

DataLayout	dl_

SelectionDAGTargetInfo	tsInfo_

Detailed Description

Definition at line 56 of file TCETargetMachinePlugin.cc.

Constructor & Destructor Documentation

◆ GeneratedTCEPlugin()

GeneratedTCEPlugin::GeneratedTCEPlugin ( )

The Constructor.

Definition at line 223 of file TCETargetMachinePlugin.cc.

                                       : 
    TCETargetMachinePlugin() {
        lowering_ = nullptr;
}

References llvm::TCETargetMachinePlugin::lowering_.

◆ ~GeneratedTCEPlugin()

GeneratedTCEPlugin::~GeneratedTCEPlugin ( )

virtual

The Destructor.

Definition at line 232 of file TCETargetMachinePlugin.cc.

                                        {
   delete instrInfo_;
   if (lowering_ != NULL) {
       delete lowering_;
       lowering_ = NULL;
   }
}

References llvm::TCETargetMachinePlugin::instrInfo_, and llvm::TCETargetMachinePlugin::lowering_.

Member Function Documentation

◆ analyzeCCBranch()

virtual bool llvm::GeneratedTCEPlugin::analyzeCCBranch	(	llvm::MachineInstr &	i,
		llvm::SmallVectorImpl< llvm::MachineOperand > &	cond
	)		const

overridevirtual

Reimplemented from llvm::TCETargetMachinePlugin.

◆ canMaterializeConstant()

virtual bool llvm::GeneratedTCEPlugin::canMaterializeConstant ( const ConstantInt & ci ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ createISelPass()

FunctionPass * GeneratedTCEPlugin::createISelPass ( TCETargetMachine * tm )

overridevirtual

Creates instruction selector for TCE target machine.

Implements llvm::TCETargetMachinePlugin.

Definition at line 320 of file TCETargetMachinePlugin.cc.

                                                       {
    return createTCEISelDag(*tm);
}

References llvm::createTCEISelDag().

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◆ dataASName()

std::string GeneratedTCEPlugin::dataASName ( )

overridevirtual

Returns name of the data address space.

Implements llvm::TCETargetMachinePlugin.

Definition at line 566 of file TCETargetMachinePlugin.cc.

                               {
    return dataASName_;
}

References dataASName_.

◆ extractElementLane()

unsigned int GeneratedTCEPlugin::extractElementLane ( const llvm::MachineInstr & mi ) const

override

Returns true in case the given opc is for an extract element operation.

Definition at line 329 of file TCETargetMachinePlugin.cc.

                                                                       {
    // TODO: use subregisters (extract_subreg) instead.
    if (mi.getDesc().getOpcode() == TCE::COPY) {
        assert(mi.getNumOperands() >= 2);
        const MachineOperand& src = mi.getOperand(1);
        int subreg = src.getSubReg();
        if (subreg > 0 && subreg < 9) {
            return subreg -1;
        }
    }
    return UINT_MAX;
}

References assert.

◆ extrasRegClass()

const llvm::TargetRegisterClass * GeneratedTCEPlugin::extrasRegClass ( const llvm::TargetRegisterClass * current ) const

overridevirtual

Returns the specific register class representing registers belonging to the "extras node" inside a clustered-TTA.

Parameters

current The "more general" register class to replace.

Implements llvm::TCETargetMachinePlugin.

Definition at line 534 of file TCETargetMachinePlugin.cc.

                                                  {
    const llvm::TargetRegisterInfo& TRI = *getRegisterInfo();
 
    return NULL;
}

References getRegisterInfo().

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◆ fpDRegNum()

virtual unsigned llvm::GeneratedTCEPlugin::fpDRegNum ( )

inlineoverridevirtual

Returns ID number of the frame pointer register.

Implements llvm::TCETargetMachinePlugin.

Definition at line 74 of file TCETargetMachinePlugin.cc.

                                          {
        return TCE::FP;
    }

◆ getAddOpcode()

virtual int llvm::GeneratedTCEPlugin::getAddOpcode ( const EVT & vt ) const

overridevirtual

◆ getDefaultType()

virtual MVT::SimpleValueType llvm::GeneratedTCEPlugin::getDefaultType ( ) const

inlineoverridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 90 of file TCETargetMachinePlugin.cc.

                                                               {
#ifdef TARGET64BIT
        return MVT::i64;
#else
        return MVT::i32;
#endif
    }

◆ getFalsePredicateOpcode()

int GeneratedTCEPlugin::getFalsePredicateOpcode ( unsigned opc ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 351 of file TCETargetMachinePlugin.cc.

                                                                  {
    std::map<unsigned int, unsigned int>::const_iterator i = falsePredOps_.find(opc);
    if (i == falsePredOps_.end()) {
        return -1;
    } else {
        return i->second;
    }
}

References falsePredOps_.

◆ getFrameLowering()

const TargetFrameLowering * GeneratedTCEPlugin::getFrameLowering ( ) const

overridevirtual

Returns TargetFrameInfo object for TCE target.

Implements llvm::TCETargetMachinePlugin.

Definition at line 293 of file TCETargetMachinePlugin.cc.

                                           {
    return frameInfo_;
}

References llvm::TCETargetMachinePlugin::frameInfo_.

◆ getInstrInfo()

const TargetInstrInfo * GeneratedTCEPlugin::getInstrInfo ( ) const

overridevirtual

Returns TargetInstrInfo object for TCE target.

Implements llvm::TCETargetMachinePlugin.

Definition at line 277 of file TCETargetMachinePlugin.cc.

                                       {
    return instrInfo_;
}

References llvm::TCETargetMachinePlugin::instrInfo_.

◆ getIorOpcode()

virtual int llvm::GeneratedTCEPlugin::getIorOpcode ( const EVT & vt ) const

overridevirtual

◆ getLoad()

virtual int llvm::GeneratedTCEPlugin::getLoad ( const TargetRegisterClass * rc ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getLoadOpcode()

virtual int llvm::GeneratedTCEPlugin::getLoadOpcode ( const EVT & vt ) const

overridevirtual

◆ getMaxOpcode()

virtual int llvm::GeneratedTCEPlugin::getMaxOpcode ( llvm::SDNode * n ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getMaxuOpcode()

virtual int llvm::GeneratedTCEPlugin::getMaxuOpcode ( llvm::SDNode * n ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getMinOpcode()

virtual int llvm::GeneratedTCEPlugin::getMinOpcode ( llvm::SDNode * n ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getMinuOpcode()

virtual int llvm::GeneratedTCEPlugin::getMinuOpcode ( llvm::SDNode * n ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getParamDRegNums()

virtual std::vector< unsigned > llvm::GeneratedTCEPlugin::getParamDRegNums ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getPointerAdjustment()

virtual std::tuple< int, int > llvm::GeneratedTCEPlugin::getPointerAdjustment ( int offset ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getRegisterInfo()

const TargetRegisterInfo * GeneratedTCEPlugin::getRegisterInfo ( ) const

overridevirtual

Returns TargetRegisterInfo object for TCE target.

Implements llvm::TCETargetMachinePlugin.

Definition at line 285 of file TCETargetMachinePlugin.cc.

                                          {
    return &(static_cast<TCEInstrInfo*>(instrInfo_))->getRegisterInfo();
}

References llvm::TCEInstrInfo::getRegisterInfo(), and llvm::TCETargetMachinePlugin::instrInfo_.

Referenced by extrasRegClass(), and registerTargetMachine().

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◆ getShlOpcode()

virtual int llvm::GeneratedTCEPlugin::getShlOpcode ( const EVT & vt ) const

overridevirtual

◆ getStore()

virtual int llvm::GeneratedTCEPlugin::getStore ( const TargetRegisterClass * rc ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ getSubtarget()

const TargetSubtargetInfo * GeneratedTCEPlugin::getSubtarget ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 312 of file TCETargetMachinePlugin.cc.

                                       {
    return subTarget_;
}

References llvm::TCETargetMachinePlugin::subTarget_.

◆ getTargetLowering()

TargetLowering * GeneratedTCEPlugin::getTargetLowering ( ) const

overridevirtual

Returns TargetLowering object for TCE target.

Implements llvm::TCETargetMachinePlugin.

Definition at line 306 of file TCETargetMachinePlugin.cc.

                                            { 
    assert(lowering_ != NULL && "TCETargetMachine has not registered to plugin.");
    return lowering_;
}

References assert, and llvm::TCETargetMachinePlugin::lowering_.

◆ getTargetTransformInfo()

TargetTransformInfo GeneratedTCEPlugin::getTargetTransformInfo ( const Function & F ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 298 of file TCETargetMachinePlugin.cc.

                                                                  {
    return TargetTransformInfo(TCETTIImpl(tm_, F));
}

References llvm::TCETargetMachinePlugin::tm_.

◆ getTruePredicateOpcode()

int GeneratedTCEPlugin::getTruePredicateOpcode ( unsigned opc ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 342 of file TCETargetMachinePlugin.cc.

                                                                 {
    std::map<unsigned int, unsigned int>::const_iterator i = truePredOps_.find(opc);
    if (i == truePredOps_.end()) {
        return -1;
    } else {
        return i->second;
    }
}

References truePredOps_.

◆ getVectorRVDRegNums()

virtual std::vector< unsigned > llvm::GeneratedTCEPlugin::getVectorRVDRegNums ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ has16bitLoads()

virtual bool llvm::GeneratedTCEPlugin::has16bitLoads ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ has8bitLoads()

virtual bool llvm::GeneratedTCEPlugin::has8bitLoads ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasMUL()

virtual bool llvm::GeneratedTCEPlugin::hasMUL ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasOperation()

virtual bool llvm::GeneratedTCEPlugin::hasOperation ( TCEString operationName ) const

inlineoverridevirtual

Returns true in case the target supports the given osal operation.

Implements llvm::TCETargetMachinePlugin.

Definition at line 113 of file TCETargetMachinePlugin.cc.

                                                                      {
        return MapTools::containsValue(opNames_, operationName.upper());
    }

References MapTools::containsValue(), operationName(), and opNames_.

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◆ hasROTL()

virtual bool llvm::GeneratedTCEPlugin::hasROTL ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasROTR()

virtual bool llvm::GeneratedTCEPlugin::hasROTR ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSDIV()

virtual bool llvm::GeneratedTCEPlugin::hasSDIV ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSHL()

virtual bool llvm::GeneratedTCEPlugin::hasSHL ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSHR()

virtual bool llvm::GeneratedTCEPlugin::hasSHR ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSHRU()

virtual bool llvm::GeneratedTCEPlugin::hasSHRU ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSQRTF()

virtual bool llvm::GeneratedTCEPlugin::hasSQRTF ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSREM()

virtual bool llvm::GeneratedTCEPlugin::hasSREM ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSXHW()

virtual bool llvm::GeneratedTCEPlugin::hasSXHW ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasSXQW()

virtual bool llvm::GeneratedTCEPlugin::hasSXQW ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasUDIV()

virtual bool llvm::GeneratedTCEPlugin::hasUDIV ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ hasUREM()

virtual bool llvm::GeneratedTCEPlugin::hasUREM ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ initialize()

void llvm::GeneratedTCEPlugin::initialize ( )

private

Referenced by manualInitialize(), and registerTargetMachine().

◆ is64bit()

virtual bool llvm::GeneratedTCEPlugin::is64bit ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ isLittleEndian()

virtual bool llvm::GeneratedTCEPlugin::isLittleEndian ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

Referenced by registerTargetMachine().

◆ llvmRegisterId()

unsigned llvm::GeneratedTCEPlugin::llvmRegisterId ( const TCEString & ttaRegister )

inlineoverridevirtual

Returns LLVM register ID corresponding to TTA register name.

Parameters

ttaRegister The name of the TTA register. For example "RF.5".

Returns: The register number if it exists in the target. Otherwise, returns TCE::NoRegister.

Implements llvm::TCETargetMachinePlugin.

Definition at line 100 of file TCETargetMachinePlugin.cc.

                                                                   {
        if (ttallvmRegMap_.count(ttaRegister)) {
            return ttallvmRegMap_[ttaRegister];
        }
        return TCE::NoRegister;
    }

References ttallvmRegMap_.

◆ manualInitialize()

void GeneratedTCEPlugin::manualInitialize ( )

virtual

Definition at line 241 of file TCETargetMachinePlugin.cc.

                                     {
    initialize();
}

References initialize().

Referenced by TCEPluginInitializer::TCEPluginInitializer().

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◆ maxVectorSize()

virtual int llvm::GeneratedTCEPlugin::maxVectorSize ( ) const

overridevirtual

Implements llvm::TCETargetMachinePlugin.

◆ nodeRegClass()

const llvm::TargetRegisterClass * GeneratedTCEPlugin::nodeRegClass	(	unsigned	nodeId,
		const llvm::TargetRegisterClass *	current
	)		const

overridevirtual

Returns the specific register class representing registers belonging to a "computation node" inside a clustered-TTA.

This can be used to limit the registers to be allocated from a single node, thus also suggest scheduling the operations there. For data parallel code.

Parameters

nodeId	the ID of the node (starting from 0)
current	The "more general" register class to replace.

Implements llvm::TCETargetMachinePlugin.

Definition at line 520 of file TCETargetMachinePlugin.cc.

                                                                   {
 
    return NULL;
}

◆ opcode()

virtual unsigned llvm::GeneratedTCEPlugin::opcode ( TCEString operationName ) const

inlineoverridevirtual

Returns the opcode for the given osal operation, undefined if not found.

Implements llvm::TCETargetMachinePlugin.

Definition at line 117 of file TCETargetMachinePlugin.cc.

                                                                    {
        return MapTools::keyForValue<unsigned>(opNames_, operationName.upper());
    }

References MapTools::keyForValue(), operationName(), and opNames_.

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◆ operationName()

std::string GeneratedTCEPlugin::operationName ( unsigned opc ) const

overridevirtual

Maps llvm target opcodes to target operation names.

Returns an empty string in case the operation code could not be mapped to an OSAL operation name. This is the case with pseudo ops, for example.

Implements llvm::TCETargetMachinePlugin.

Definition at line 368 of file TCETargetMachinePlugin.cc.

                                                    {
 
    const std::string MOVE = "MOVE";
    const std::string PSEUDO = "PSEUDO";
    const std::string NOP = "NOP";
    const std::string INLINEASM = "INLINEASM";
    const std::string DEBUG_LABEL = "DEBUG_LABEL";
    const std::string DEBUG_VALUE = "DEBUG_VALUE";
    const std::string DEBUG_INSTR_REF = "DEBUG_INSTR_REF";
    const std::string DEBUG_VALUE_LIST = "DEBUG_VALUE_LIST";
    const std::string DEBUG_PHI = "DEBUG_PHI";
 
    if (opc == TCE::IMPLICIT_DEF) return PSEUDO;
    else if (opc == TCE::ADJCALLSTACKDOWN) return PSEUDO;
    else if (opc == TCE::ADJCALLSTACKUP) return PSEUDO;
    else if (opc == TCE::NOP) return NOP;
    if (opc == TCE::DBG_VALUE) return DEBUG_VALUE;
    if (opc == TCE::DBG_INSTR_REF) return DEBUG_INSTR_REF;
    if (opc == TCE::DBG_LABEL) return DEBUG_LABEL;
    if (opc == TCE::DBG_VALUE_LIST) return DEBUG_VALUE_LIST;
    if (opc == TCE::DBG_PHI) return DEBUG_PHI;
    // Moves
    if (opc == TCE::COPY) return MOVE;
    if (opc == TCE::MOVI1rr) return MOVE;
    if (opc == TCE::PRED_TRUE_MOVI1rr) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOVI1rr) return "!MOVE";
    if (opc == TCE::MOVI1ri) return MOVE;
    if (opc == TCE::PRED_TRUE_MOVI1ri) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOVI1ri) return "!MOVE";
    if (opc == TCE::MOVGri) return MOVE;
    if (opc == TCE::MOVI32rr) return MOVE;
    if (opc == TCE::PRED_TRUE_MOVI32rr) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOVI32rr) return "!MOVE";
    if (opc == TCE::MOVI32ri) return MOVE;
    if (opc == TCE::PRED_TRUE_MOVI32ri) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOVI32ri) return "!MOVE";
    if (opc == TCE::MOVI64sa) return MOVE;
    if (opc == TCE::PRED_TRUE_MOVI64sa) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOVI64sa) return "!MOVE";
    if (opc == TCE::MOV64ss) return MOVE;
    if (opc == TCE::PRED_TRUE_MOV64ss) return "?MOVE";
    if (opc == TCE::PRED_FALSE_MOV64ss) return "!MOVE";
    if (opc == TCE::MOVI64I1ss) return MOVE;
 
    // TODO: why no predicated version of this?
    if (opc == TCE::MOVff) return MOVE;
    if (opc == TCE::MOVfi) return MOVE;
    if (opc == TCE::MOVfk) return MOVE;
    if (opc == TCE::MOVI32I1rr) return MOVE;
    if (opc == TCE::MOVFI32rf) return MOVE;
    if (opc == TCE::MOVIF32fr) return MOVE;
    if (opc == TCE::MOVGrr) return MOVE;
    if (opc == TCE::MOVGI32rr) return MOVE;
    if (opc == TCE::MOVI32Grr) return MOVE;
    if (opc == TCE::MOVGI1rr) return MOVE;
    if (opc == TCE::MOVI1Grr) return MOVE;
    if (opc == TCE::MOVhh) return MOVE;
    if (opc == TCE::MOVhk) return MOVE;
    if (opc == TCE::MOVrh) return MOVE;
    if (opc == TCE::MOVhr) return MOVE;
    if (opc == TCE::MOVhi) return MOVE;
    if (opc == TCE::MOVsd) return MOVE;
    if (opc == TCE::MOVds) return MOVE;
 
    // TODO: added as a spot fix for simd_operations_On,
    // which selects this particular move operation.
    // Most likely, the compiler can pick other moves not
    // listed here, and subsequently crash.
    if (opc == TCE::MOVI1I32rr) return MOVE;
 
    if (opc == TCE::INLINEASM) return INLINEASM;
 
/* TODO: 64-bit support missing here? */
 
    if (opc == TCE::ADDfri || opc == TCE::ADDhri) return "add";
    
    if (opc == TCE::SUBfir || opc == TCE::SUBfri || opc == TCE::SUBhir ||
        opc == TCE::SUBhri) return "sub";
 
    if (opc == TCE::SUBfir) return "sub";
    if (opc == TCE::SUBfri) return "sub";
 
#ifdef TARGET64BIT
    if (opc == TCE::ANDext) return "and64";
    if (opc == TCE::XORbicmp) return "xor64";
#else
    if (opc == TCE::ANDext) return "and";
    if (opc == TCE::XORbicmp) return "xor";
#endif
 
 
    if (opc == TCE::STQBrb) return "stq";
    if (opc == TCE::STQBib) return "stq";
    if (opc == TCE::STQBrj) return "stq";
    if (opc == TCE::STQBij) return "stq";
 
    if (opc == TCE::ST8Brb) return "st8";
    if (opc == TCE::ST8Bib) return "st8";
    if (opc == TCE::ST8Brj) return "st8";
    if (opc == TCE::ST8Bij) return "st8";
 
    // temporary RA register store/loads
#ifdef TARGET64BIT
    if (opc == TCE::ST64RAss) return "st64";
    if (opc == TCE::LD64RAs) return "ld64";
#else
    if (opc == TCE::STWRArr) return "stw";
    if (opc == TCE::LDWRAr) return "ldw";
    if (opc == TCE::ST32RArr) return "st32";
    if (opc == TCE::LD32RAr) return "ld32";
#endif
    if (opc == TCE::TCEBR) return "jump";
    if (opc == TCE::TCEBRIND) return "jump";
    if (opc == TCE::CALL) return "call";
    if (opc == TCE::CALL_MEMrr) return "call";
    if (opc == TCE::CALL_MEMri) return "call";
 
    std::map<unsigned int, TCEString>::const_iterator opNameIt;
 
    std::map<unsigned int, TCEString>::const_iterator i = opNames_.find(opc);
    if (i == opNames_.end()) {
        std::cerr << "ERROR: Couldn't find operation with opc: " << opc
                  << std::endl;
        std::cerr << "Total ops: " << opNames_.size() << std::endl;
/*
        abort();
*/
        return "";
    } else {
        return i->second;
    }
}

References MOVE, NOP, and opNames_.

Referenced by hasOperation(), and opcode().

◆ raPortDRegNum()

unsigned GeneratedTCEPlugin::raPortDRegNum ( )

overridevirtual

Returns ID number of the return address register.

Implements llvm::TCETargetMachinePlugin.

Definition at line 571 of file TCETargetMachinePlugin.cc.

                                  {
    return TCE::RA;
}

◆ registerIndex()

unsigned GeneratedTCEPlugin::registerIndex ( unsigned dwarfRegNum )

overridevirtual

Maps llvm register numbers to target RF indices.

Implements llvm::TCETargetMachinePlugin.

Definition at line 557 of file TCETargetMachinePlugin.cc.

                                                      {
    if (regIndices_.find(dwarfRegNum) == regIndices_.end()) {
        return dwarfRegNum;
    }
    return regIndices_[dwarfRegNum];
}

References regIndices_.

◆ registerTargetMachine()

void GeneratedTCEPlugin::registerTargetMachine ( TCETargetMachine & tm )

overridevirtual

Plugin needs target machine for TragetLowering generation.

Implements llvm::TCETargetMachinePlugin.

Definition at line 246 of file TCETargetMachinePlugin.cc.

                          {
    tm_ = &tm;
    instrInfo_ = new TCEInstrInfo(this);
    // Initialize register & opcode maps.
    initialize();
 
    TCERegisterInfo* ri =
        const_cast<TCERegisterInfo*>(
            static_cast<const TCERegisterInfo*>(getRegisterInfo()));
    frameInfo_ = new TCEFrameLowering(ri, instrInfo_, tm.stackAlignment());
 
    if (isLittleEndian()) {
#ifndef TARGET64BIT
        subTarget_ = new TCELESubtarget(this);
#else
        subTarget_ = new TCELE64Subtarget(this);
#endif
    } else {
        subTarget_ = new TCESubtarget(this);
    }
 
    if (lowering_ == NULL) {
        lowering_ = new TCETargetLowering(*tm_, *subTarget_);
    }
}

References llvm::TCETargetMachinePlugin::frameInfo_, getRegisterInfo(), initialize(), llvm::TCETargetMachinePlugin::instrInfo_, isLittleEndian(), llvm::TCETargetMachinePlugin::lowering_, llvm::TCETargetMachine::stackAlignment(), llvm::TCETargetMachinePlugin::subTarget_, and llvm::TCETargetMachinePlugin::tm_.

Here is the call graph for this function:

◆ rfName()

std::string GeneratedTCEPlugin::rfName ( unsigned dwarfRegNum )

overridevirtual

Maps llvm register numbers to target RF names.

Implements llvm::TCETargetMachinePlugin.

Definition at line 546 of file TCETargetMachinePlugin.cc.

                                               {
    if (regNames_.find(dwarfRegNum) == regNames_.end()) {
        return "BYPASS_PSEUDO";
    }
    return regNames_[dwarfRegNum];
}

References regNames_.

◆ rvDRegNum()

virtual unsigned llvm::GeneratedTCEPlugin::rvDRegNum ( )

inlineoverridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 78 of file TCETargetMachinePlugin.cc.

                                          {
        return TCE::IRES0;
    }

◆ rvHighDRegNum()

virtual unsigned llvm::GeneratedTCEPlugin::rvHighDRegNum ( )

inlineoverridevirtual

Implements llvm::TCETargetMachinePlugin.

Definition at line 82 of file TCETargetMachinePlugin.cc.

                                              {
        return TCE::KLUDGE_REGISTER;
    }

◆ spDRegNum()

virtual unsigned llvm::GeneratedTCEPlugin::spDRegNum ( )

inlineoverridevirtual

Returns ID number of the stack pointer register.

Implements llvm::TCETargetMachinePlugin.

Definition at line 70 of file TCETargetMachinePlugin.cc.

                                          {
        return TCE::SP;
    }

◆ validStackAccessOperation()

bool GeneratedTCEPlugin::validStackAccessOperation ( const std::string & opName ) const

overridevirtual

Returns true if OSAL operation is valid for stack accesses.

Implements llvm::TCETargetMachinePlugin.

Definition at line 502 of file TCETargetMachinePlugin.cc.

                                                                           {
    return validStackAccessOperations_.count(opName);
}

References validStackAccessOperations_.

Member Data Documentation

◆ dataASName_

std::string llvm::GeneratedTCEPlugin::dataASName_

private

Definition at line 198 of file TCETargetMachinePlugin.cc.

Referenced by dataASName().

◆ falsePredOps_

std::map<unsigned, unsigned> llvm::GeneratedTCEPlugin::falsePredOps_

private

Definition at line 190 of file TCETargetMachinePlugin.cc.

Referenced by getFalsePredicateOpcode().

◆ opNames_

std::map<unsigned, TCEString> llvm::GeneratedTCEPlugin::opNames_

private

Definition at line 188 of file TCETargetMachinePlugin.cc.

Referenced by hasOperation(), opcode(), and operationName().

◆ regIndices_

std::map<unsigned, unsigned> llvm::GeneratedTCEPlugin::regIndices_

private

Definition at line 192 of file TCETargetMachinePlugin.cc.

Referenced by registerIndex().

◆ regNames_

std::map<unsigned, TCEString> llvm::GeneratedTCEPlugin::regNames_

private

Definition at line 191 of file TCETargetMachinePlugin.cc.

Referenced by rfName().

◆ truePredOps_

std::map<unsigned, unsigned> llvm::GeneratedTCEPlugin::truePredOps_

private

Definition at line 189 of file TCETargetMachinePlugin.cc.

Referenced by getTruePredicateOpcode().

◆ ttallvmRegMap_

std::map<TCEString, unsigned> llvm::GeneratedTCEPlugin::ttallvmRegMap_

private

Map for TTA register to LLVM register id conversion.

Definition at line 194 of file TCETargetMachinePlugin.cc.

Referenced by llvmRegisterId().

◆ validStackAccessOperations_

TCETools::CIStringSet llvm::GeneratedTCEPlugin::validStackAccessOperations_

private

Set of valid LLVM opcodes for stack accesses.

Definition at line 196 of file TCETargetMachinePlugin.cc.

Referenced by validStackAccessOperation().

The documentation for this class was generated from the following file:

TCETargetMachinePlugin.cc

Public Member Functions

Private Member Functions

Private Attributes

Additional Inherited Members

Detailed Description

Constructor & Destructor Documentation

◆ GeneratedTCEPlugin()

◆ ~GeneratedTCEPlugin()

Member Function Documentation

◆ analyzeCCBranch()

◆ canMaterializeConstant()

◆ createISelPass()

◆ dataASName()

◆ extractElementLane()

◆ extrasRegClass()

◆ fpDRegNum()

◆ getAddOpcode()

◆ getDefaultType()

◆ getFalsePredicateOpcode()

◆ getFrameLowering()

◆ getInstrInfo()

◆ getIorOpcode()

◆ getLoad()

◆ getLoadOpcode()

◆ getMaxOpcode()

◆ getMaxuOpcode()

◆ getMinOpcode()

◆ getMinuOpcode()

◆ getParamDRegNums()

◆ getPointerAdjustment()

◆ getRegisterInfo()

◆ getShlOpcode()

◆ getStore()

◆ getSubtarget()

◆ getTargetLowering()

◆ getTargetTransformInfo()

◆ getTruePredicateOpcode()

◆ getVectorRVDRegNums()

◆ has16bitLoads()

◆ has8bitLoads()

◆ hasMUL()

◆ hasOperation()

◆ hasROTL()

◆ hasROTR()

◆ hasSDIV()

◆ hasSHL()

◆ hasSHR()

◆ hasSHRU()

◆ hasSQRTF()

◆ hasSREM()

◆ hasSXHW()

◆ hasSXQW()

◆ hasUDIV()

◆ hasUREM()

◆ initialize()

◆ is64bit()

◆ isLittleEndian()

◆ llvmRegisterId()

◆ manualInitialize()

◆ maxVectorSize()

◆ nodeRegClass()

◆ opcode()

◆ operationName()

◆ raPortDRegNum()

◆ registerIndex()

◆ registerTargetMachine()

◆ rfName()

◆ rvDRegNum()

◆ rvHighDRegNum()

◆ spDRegNum()

◆ validStackAccessOperation()

Member Data Documentation

◆ dataASName_

◆ falsePredOps_

◆ opNames_

◆ regIndices_

◆ regNames_

◆ truePredOps_

◆ ttallvmRegMap_

◆ validStackAccessOperations_