Go to the documentation of this file.
65 if (!cuOps.count(
"hwloop") && !cuOps.count(
"lbufs") &&
66 !cuOps.count(
"infloop")) {
69 "Could not recognize any loop buffer "
70 "utilizing operations in CU");
71 }
else if (cuOps.count(
"hwloop") && cuOps.count(
"lbufs")) {
74 "Can not support hwloop and lbufs "
75 "operation combination.");
76 }
else if (cuOps.count(
"lbufs") && cuOps.count(
"infloop")) {
79 "Can not support lbufs and infloop "
80 "operation combination.");
102 addPort(
new InPort(
"fetchblock_in",
"IMEMWIDTHINMAUS*IMEMMAUWIDTH"));
104 addPort(
new OutPort(
"dispatch_out",
"IMEMWIDTHINMAUS*IMEMMAUWIDTH"));
107 if (cuOps.count(
"hwloop")) {
112 addPort(
new InPort(
"loop_len_in",
"bit_width(LBUFMAXDEPTH+1)"));
116 if (cuOps.count(
"hwloop")) {
124 if (cuOps.count(
"hwloop")) {
125 if (cuOps.count(
"lbufc")) {
128 "BREAK-operation is not currently "
129 "available with HWLOOP operation.");
136 }
else if (cuOps.count(
"lbufs")) {
137 if (cuOps.count(
"lbufc")) {
140 "BREAK-operation is not currently "
141 "available with LBUFS operation.");
148 }
else if (cuOps.count(
"infloop")) {
149 if (cuOps.count(
"lbufc")) {
219 Parameter(
"enable_usage_trace",
"boolean", value ?
"true" :
"false"));
343 std::string target = targetBaseDir.string() +
347 bool usesLoopBreaking =
stopPortIn() !=
nullptr;
352 if (usesLoopBreaking) {
356 "loop_stop_in : in std_logic;");
359 progeDataDir /
"inflooper_fsm_with_stopping.snippet");
361 "signal-declarations",
362 progeDataDir /
"inflooper_stop_signals.snippet");
364 "stop-reg", progeDataDir /
"inflooper_stop_register.snippet");
367 "fsm-logic", progeDataDir /
"inflooper_fsm_default.snippet");
void setModuleName(const std::string &name)
NetlistPort * lockReqPortIn_
NetlistPort * addPort(NetlistPort *port)
const NetlistPort & lenCntrPortOut() const
const NetlistPort & lockReqPortOut() const
NetlistPort * stopPortIn_
const TTAMachine::Machine & adf() const
static NetlistPort * resetPort(Direction direction=IN)
void setParameter(const Parameter ¶m)
Convenience class for output bit ports.
void addParameter(const Parameter ¶m)
const NetlistPort & loopFromImemPortOut() const
void setBufferSizeParameter(const std::string value)
void setCoreIdParameter(const std::string value)
NetlistPort * loopIterationPortIn_
NetlistPort * instructionPortIn_
void replacePlaceholderFromFile(const std::string &key, const Path &filePath, bool append=false)
NetlistPort * lockPortOut_
const NetlistPort & instructionPortOut() const
const NetlistPort & instructionPortIn() const
const NetlistPort * loopIterationPortIn() const
#define assert(condition)
NetlistPort * startPortIn_
NetlistPort * loopBodySizePortIn_
virtual ControlUnit * controlUnit() const
Convenience class for input ports.
virtual bool hasParameter(const std::string &name) const
#define THROW_EXCEPTION(exceptionType, message)
Exception wrapper macro that automatically includes file name, line number and function name where th...
const NetlistPort & lockPortOut() const
NetlistPort * lockReqPortOut_
const NetlistPort & lockPortIn() const
void setUsageTracingParameter(bool setting)
static OperationSet getOpset(const TTAMachine::Machine &mach)
NetlistPort * lenCntrPortOut_
const NetlistPort & lockReqPortIn() const
const NetlistPort & loopBodySizePortIn() const
NetlistPort * loopFromImemPortOut_
const std::string & coreEntityName() const
NetlistPort * lockPortIn_
const NetlistPort * stopPortIn() const
void setIterationPortWidthParameter(const std::string value)
static const std::string DIRECTORY_SEPARATOR
static NetlistPort * clockPort(Direction direction=IN)
virtual ~LoopBufferBlock()
void replacePlaceholder(const std::string &key, const std::string &replacer, bool append=false)
TCETools::CIStringSet OperationSet
std::string implmenetationFile_
NetlistPort * instructionPortOut_
HDL
HDLs supported by ProGe.
const std::string & moduleName() const
void instantiateTemplateFile(const std::string &templateFile, const std::string &dstFile)
void rename(const std::string &newname)
void setBlockWidthParameter(const std::string value)
const NetlistPort & startPortIn() const
Convenience class for input bit ports.
Convenience class for output ports.
virtual void write(const Path &targetBaseDir, HDL targetLang=VHDL) const override
static std::string dataDirPath(const std::string &prog)