Go to the documentation of this file.
60 instanceName_(
"defaultInstanceName_inst0"),
61 moduleName_(
"defaultModuleName"),
71 instanceName_(
"defaultInstanceName_inst0"),
72 moduleName_(
"defaultModuleName"),
80 const std::string& moduleName,
const std::string& instanceName,
88 instanceName_(instanceName),
89 moduleName_(moduleName),
106 for (PortGroupContainerType::reverse_iterator it =
portGroups_.rbegin();
114 for (PortContainerType::reverse_iterator it =
ports_.rbegin();
122 for (BlockContainerType::reverse_iterator it =
subBlocks_.rbegin();
208 ") does not have parameter \"" +
name +
"\"");
227 ") does not have parameter \"" +
name +
"\"");
263 std::vector<const NetlistPort*>
265 std::vector<const NetlistPort*> result;
266 for (
size_t i = 0; i <
portCount(); i++) {
269 result.push_back(&
port);
285 std::vector<const NetlistPort*> matches =
portsBy(type);
286 if (index < matches.size()) {
287 return *matches.at(index);
301 std::vector<const NetlistPort*> result;
302 for (
size_t i = 0; i <
portCount(); i++) {
318 return findPort(portName,
false, partialMatch);
336 std::vector<const NetlistPortGroup*>
338 std::vector<const NetlistPortGroup*> found;
383 " is not unique within parent "
436 for (
size_t i = 0; i <
subBlocks_.size(); i++) {
451 for (
size_t i = 0; i <
subBlocks_.size(); i++) {
468 assert(
port !=
nullptr &&
"Attempted to add null port.");
472 "Given port by name (" +
port->
name() +
473 ") already exists in the netlist block (" +
474 this->instanceName() +
" : " + this->moduleName() +
").");
497 "Attempted to remove a port the block does not have.");
534 if (p.name() == param.
name()) {
550 if (p.name() == param.
name()) {
553 "The block \"" +
name() +
"\" already has parameter\"" +
554 param.
name() +
"\"");
561 assert(!packageName.empty());
575 const std::string& portName,
bool recursiveSearch,
576 bool partialMatch)
const {
577 if (recursiveSearch) {
580 "BaseNetlistBlock::findPort(): "
581 "recursive search not implemented.");
585 for (
size_t i = 0; i <
portCount(); i++) {
586 if (
ports_.at(i)->name() == portName) {
591 for (
size_t i = 0; i <
portCount(); i++) {
592 if (
ports_.at(i)->name().find(portName) != std::string::npos) {
617 subblock->write(targetBaseDir, targetLang);
643 (!instanceName.empty()) ?
instanceName : this->instanceName(),
652 std::map<std::string, NetlistPort*> copiedPorts;
654 for (
size_t i = 0; i <
portCount(); i++) {
657 copiedPorts.insert({{copiedPort->
name(), copiedPort}});
665 for (
auto port : *portGrp) {
675 block->
portCount() == this->portCount() &&
676 "Port count mismatch in shallow copy.");
724 assert(clkPorts.size() == 1);
745 assert(resetPorts.size() == 1);
void setModuleName(const std::string &name)
NetlistPort * addPort(NetlistPort *port)
const std::string name() const
virtual NetlistPortGroup * clone(bool asMirrored=false) const
void addSubBlock(BaseNetlistBlock *subBlock, const std::string &instanceName="")
void unregisterPort(NetlistPort &port)
const BaseNetlistBlock & parentBlock() const
virtual bool hasPortsBy(SignalType type) const
virtual void writeSelf(const Path &targetBaseDir, HDL targetLang=VHDL) const
virtual bool hasSubBlock(const std::string &instanceName) const
virtual bool isSubBlock(const BaseNetlistBlock &block) const
virtual size_t parameterCount() const
void setParameter(const Parameter ¶m)
void removePort(NetlistPort *port)
const NetlistPort & portAt(size_t index) const
void addParameter(const Parameter ¶m)
Direction direction() const
const std::string & instanceName() const
void setParent(BaseNetlistBlock *newParent)
virtual std::vector< const NetlistPort * > portsBy(SignalType type) const
virtual const std::string & package(size_t idx) const
BlockContainerType subBlocks_
The sub blocks of this netlist block.
virtual void write(const std::string &dstDirectory)
virtual void connect() override
virtual const Netlist & netlist() const
virtual const BaseNetlistBlock & parentBlock() const
static std::string toString(const T &source)
bool connect(const NetlistPort &port1, const NetlistPort &port2, int port1FirstBit, int port2FirstBit, int width=1)
void deleteSubBlock(BaseNetlistBlock *subBlock)
Netlist * netlist_
The netlist of the block.
virtual size_t portGroupCount() const
virtual bool hasParentBlock() const
#define assert(condition)
BaseNetlistBlock * parent_
The reference to parent block of this block.
void addPortGroup(NetlistPortGroup *portGroup)
size_t parameterCount() const
virtual void write(const std::string &dstDirectory)
const std::string & packageNameOfConstant() const
NetlistPort * copyTo(BaseNetlistBlock &newParent, std::string newName="") const
virtual void setParent(BaseNetlistBlock *parent)
virtual bool hasParameter(const std::string &name) const
virtual const Parameter & parameter(const std::string &name) const
virtual std::vector< const NetlistPortGroup * > portGroupsBy(SignalGroupType type) const
#define THROW_EXCEPTION(exceptionType, message)
Exception wrapper macro that automatically includes file name, line number and function name where th...
bool valueIsConstant() const
PortContainerType ports_
The ports of the block.
virtual size_t portCount() const
const TCEString & name() const
virtual size_t packageCount() const
void addPackage(const std::string &packageName)
void addPort(NetlistPort &port)
NetlistPort * findPort(const std::string &portName, bool recursiveSearch=false, bool partialMatch=true) const
bool hasParentBlock() const
std::string moduleName_
The module name of the block.
virtual const NetlistPortGroup & portGroup(size_t index) const
PortGroupContainerType portGroups_
The ports of the block.
std::string instanceName_
The instance name of the block.
virtual const NetlistPort & portBy(SignalType type, size_t index=0) const
SignalGroup assignedSignalGroup() const
virtual ~BaseNetlistBlock()
void setParent(BaseNetlistBlock *parent)
virtual void finalize() override
size_t registerPort(NetlistPort &port)
Parameter parameter(size_t index) const
void removeSubBlock(BaseNetlistBlock *subBlock)
ParameterContainerType parameters_
The parameters of the block.
HDL
HDLs supported by ProGe.
const std::string & moduleName() const
std::vector< std::string > packages_
The referenced packages by the module.
virtual const BaseNetlistBlock & subBlock(size_t index) const
Signal assignedSignal() const
void setParameter(const std::string &name, const std::string &type, const std::string &value)
void setInstanceName(const std::string &name)
BaseNetlistBlock * shallowCopy(const std::string &instanceName="") const
virtual void build() override
void removePortGroup(NetlistPortGroup *portGroup)
virtual size_t subBlockCount() const
virtual const NetlistPort & port(size_t index) const
virtual void write(const Path &targetBaseDir, HDL targetLang=VHDL) const override