OpenASIP
2.0
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#include <AlteraOnchipRomGenerator.hh>
Public Member Functions | |
AlteraOnchipRomGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
virtual | ~AlteraOnchipRomGenerator () |
virtual bool | generatesComponentHdlFile () const |
virtual std::vector< TCEString > | generateComponentFile (TCEString outputPath) |
virtual void | addMemory (const ProGe::NetlistBlock &ttaCore, ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
Public Member Functions inherited from AlteraMemGenerator | |
AlteraMemGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
virtual | ~AlteraMemGenerator () |
Public Member Functions inherited from MemoryGenerator | |
MemoryGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
virtual | ~MemoryGenerator () |
virtual bool | isCompatible (const ProGe::NetlistBlock &ttaCore, int coreId, std::vector< TCEString > &reasons) const |
int | memoryTotalWidth () const |
int | memoryMauSize () const |
int | memoryWidthInMaus () const |
int | memoryAddrWidth () const |
TCEString | initializationFile () const |
void | addLsu (TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts) |
Protected Member Functions | |
virtual TCEString | moduleName () const |
virtual TCEString | instanceName (int coreId, int memIndex) const |
Protected Member Functions inherited from AlteraMemGenerator | |
std::vector< TCEString > | instantiateAlteraTemplate (const TCEString &templateFile, const TCEString &outputPath) const |
virtual void | addGenerics (ProGe::NetlistBlock &topBlock, const TCEString &addrWidth, const TCEString &dataWidth, int memIndex) |
Protected Member Functions inherited from MemoryGenerator | |
virtual bool | checkFuPort (const std::string fuPort, std::vector< TCEString > &reasons) const |
virtual void | connectPorts (ProGe::NetlistBlock &netlistBlock, const ProGe::NetlistPort &memPort, const ProGe::NetlistPort &corePort, bool inverted, int coreId) |
virtual MemoryGenerator::BlockPair | createMemoryNetlistBlock (ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
const PlatformIntegrator * | platformIntegrator () const |
std::ostream & | warningStream () |
std::ostream & | errorStream () |
int | portCount () const |
const HDLPort * | port (int index) const |
const HDLPort * | portByKeyName (TCEString name) const |
TCEString | portKeyName (const HDLPort *port) const |
void | addPort (const TCEString &name, HDLPort *port) |
int | parameterCount () const |
const ProGe::Parameter & | parameter (int index) const |
void | addParameter (const ProGe::Parameter &add) |
TCEString | ttaCoreName () const |
TCEString | memoryIndexString (int coreId, int memIndex) const |
TCEString | templatePath () const |
void | instantiateTemplate (const TCEString &inFile, const TCEString &outFile, const TCEString &entity) const |
bool | hasLSUArchitecture () const |
const TTAMachine::FunctionUnit & | lsuArchitecture () const |
TCEString | corePortName (const TCEString &portBaseName, int coreId) const |
Static Private Attributes | |
static const TCEString | COMPONENT_FILE |
Additional Inherited Members | |
Protected Types inherited from MemoryGenerator | |
typedef std::multimap< TCEString, HDLPort * > | PortMap |
typedef std::pair< ProGe::NetlistBlock *, ProGe::VirtualNetlistBlock * > | BlockPair |
Static Protected Attributes inherited from AlteraMemGenerator | |
static const TCEString | INIT_FILE_G = "init_file_g" |
static const TCEString | DEV_FAMILY_G = "dev_family_g" |
static const TCEString | ADDRW_G = "addrw_g" |
static const TCEString | DATAW_G = "dataw_g" |
Definition at line 43 of file AlteraOnchipRomGenerator.hh.
AlteraOnchipRomGenerator::AlteraOnchipRomGenerator | ( | int | memMauWidth, |
int | widthInMaus, | ||
int | addrWidth, | ||
TCEString | initFile, | ||
const PlatformIntegrator * | integrator, | ||
std::ostream & | warningStream, | ||
std::ostream & | errorStream | ||
) |
Definition at line 44 of file AlteraOnchipRomGenerator.cc.
References MemoryGenerator::addPort(), ProGe::BIT, ProGe::BIT_VECTOR, ProGe::StaticSignal::GND, ProGe::IN, ProGe::OUT, and HDLPort::setToStatic().
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virtual |
Definition at line 77 of file AlteraOnchipRomGenerator.cc.
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virtual |
Reimplemented from AlteraMemGenerator.
Definition at line 93 of file AlteraOnchipRomGenerator.cc.
References AlteraMemGenerator::addGenerics(), and MemoryGenerator::addMemory().
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virtual |
Implements MemoryGenerator.
Definition at line 87 of file AlteraOnchipRomGenerator.cc.
References COMPONENT_FILE, and AlteraMemGenerator::instantiateAlteraTemplate().
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virtual |
Implements MemoryGenerator.
Definition at line 81 of file AlteraOnchipRomGenerator.cc.
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protectedvirtual |
Implements MemoryGenerator.
Definition at line 115 of file AlteraOnchipRomGenerator.cc.
References MemoryGenerator::memoryIndexString().
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protectedvirtual |
Implements MemoryGenerator.
Definition at line 108 of file AlteraOnchipRomGenerator.cc.
References MemoryGenerator::ttaCoreName().
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staticprivate |
Definition at line 76 of file AlteraOnchipRomGenerator.hh.
Referenced by generateComponentFile().