OpenASIP
2.0
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#include <AlteraMemGenerator.hh>
Public Member Functions | |
AlteraMemGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
virtual | ~AlteraMemGenerator () |
virtual void | addMemory (const ProGe::NetlistBlock &ttaCore, ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
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MemoryGenerator (int memMauWidth, int widthInMaus, int addrWidth, TCEString initFile, const PlatformIntegrator *integrator, std::ostream &warningStream, std::ostream &errorStream) | |
virtual | ~MemoryGenerator () |
virtual bool | isCompatible (const ProGe::NetlistBlock &ttaCore, int coreId, std::vector< TCEString > &reasons) const |
virtual bool | generatesComponentHdlFile () const =0 |
virtual std::vector< TCEString > | generateComponentFile (TCEString outputPath)=0 |
int | memoryTotalWidth () const |
int | memoryMauSize () const |
int | memoryWidthInMaus () const |
int | memoryAddrWidth () const |
TCEString | initializationFile () const |
void | addLsu (TTAMachine::FunctionUnit &lsuArch, std::vector< std::string > lsuPorts) |
Protected Member Functions | |
std::vector< TCEString > | instantiateAlteraTemplate (const TCEString &templateFile, const TCEString &outputPath) const |
virtual void | addGenerics (ProGe::NetlistBlock &topBlock, const TCEString &addrWidth, const TCEString &dataWidth, int memIndex) |
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virtual bool | checkFuPort (const std::string fuPort, std::vector< TCEString > &reasons) const |
virtual void | connectPorts (ProGe::NetlistBlock &netlistBlock, const ProGe::NetlistPort &memPort, const ProGe::NetlistPort &corePort, bool inverted, int coreId) |
virtual MemoryGenerator::BlockPair | createMemoryNetlistBlock (ProGe::NetlistBlock &integratorBlock, int memIndex, int coreId) |
const PlatformIntegrator * | platformIntegrator () const |
std::ostream & | warningStream () |
std::ostream & | errorStream () |
int | portCount () const |
const HDLPort * | port (int index) const |
const HDLPort * | portByKeyName (TCEString name) const |
TCEString | portKeyName (const HDLPort *port) const |
void | addPort (const TCEString &name, HDLPort *port) |
int | parameterCount () const |
const ProGe::Parameter & | parameter (int index) const |
void | addParameter (const ProGe::Parameter &add) |
TCEString | ttaCoreName () const |
virtual TCEString | moduleName () const =0 |
virtual TCEString | instanceName (int coreId, int memIndex) const =0 |
TCEString | memoryIndexString (int coreId, int memIndex) const |
TCEString | templatePath () const |
void | instantiateTemplate (const TCEString &inFile, const TCEString &outFile, const TCEString &entity) const |
bool | hasLSUArchitecture () const |
const TTAMachine::FunctionUnit & | lsuArchitecture () const |
TCEString | corePortName (const TCEString &portBaseName, int coreId) const |
Static Protected Attributes | |
static const TCEString | INIT_FILE_G = "init_file_g" |
static const TCEString | DEV_FAMILY_G = "dev_family_g" |
static const TCEString | ADDRW_G = "addrw_g" |
static const TCEString | DATAW_G = "dataw_g" |
Additional Inherited Members | |
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typedef std::multimap< TCEString, HDLPort * > | PortMap |
typedef std::pair< ProGe::NetlistBlock *, ProGe::VirtualNetlistBlock * > | BlockPair |
Definition at line 43 of file AlteraMemGenerator.hh.
AlteraMemGenerator::AlteraMemGenerator | ( | int | memMauWidth, |
int | widthInMaus, | ||
int | addrWidth, | ||
TCEString | initFile, | ||
const PlatformIntegrator * | integrator, | ||
std::ostream & | warningStream, | ||
std::ostream & | errorStream | ||
) |
Definition at line 45 of file AlteraMemGenerator.cc.
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virtual |
Definition at line 57 of file AlteraMemGenerator.cc.
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protectedvirtual |
Definition at line 96 of file AlteraMemGenerator.cc.
References MemoryGenerator::addParameter(), ADDRW_G, DATAW_G, DEV_FAMILY_G, PlatformIntegrator::deviceFamily(), ProGe::BaseNetlistBlock::hasParameter(), INIT_FILE_G, MemoryGenerator::initializationFile(), MemoryGenerator::instanceName(), ProGe::Parameter::name(), MemoryGenerator::platformIntegrator(), and ProGe::NetlistBlock::setParameter().
Referenced by addMemory(), and AlteraOnchipRomGenerator::addMemory().
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virtual |
Reimplemented from MemoryGenerator.
Reimplemented in AlteraOnchipRomGenerator.
Definition at line 81 of file AlteraMemGenerator.cc.
References addGenerics(), MemoryGenerator::addMemory(), MemoryGenerator::memoryAddrWidth(), MemoryGenerator::memoryTotalWidth(), and Conversion::toString().
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protected |
Definition at line 62 of file AlteraMemGenerator.cc.
References FileSystem::DIRECTORY_SEPARATOR, MemoryGenerator::instantiateTemplate(), MemoryGenerator::moduleName(), MemoryGenerator::templatePath(), and MemoryGenerator::ttaCoreName().
Referenced by AlteraHibiDpRamGenerator::generateComponentFile(), AlteraOnchipRomGenerator::generateComponentFile(), and AlteraOnchipRamGenerator::generateComponentFile().
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staticprotected |
Definition at line 77 of file AlteraMemGenerator.hh.
Referenced by addGenerics(), AlteraHibiDpRamGenerator::AlteraHibiDpRamGenerator(), and AlteraOnchipRamGenerator::AlteraOnchipRamGenerator().
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staticprotected |
Definition at line 78 of file AlteraMemGenerator.hh.
Referenced by addGenerics(), AlteraHibiDpRamGenerator::AlteraHibiDpRamGenerator(), and AlteraOnchipRamGenerator::AlteraOnchipRamGenerator().
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staticprotected |
Definition at line 76 of file AlteraMemGenerator.hh.
Referenced by addGenerics().
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staticprotected |
Definition at line 75 of file AlteraMemGenerator.hh.
Referenced by addGenerics().