39#ifndef BFOPTIMIZATION_HH
40#define BFOPTIMIZATION_HH
76#ifdef CHECK_DDG_EQUALITY
88#ifdef CHECK_DDG_EQUALITY
89 virtual void undo()
override;
101 unsigned int ii()
const;
111 int immWriteCycle = -1,
112 int prologImmWriteCycle = -1,
114 int immRegIndex = -1,
115 bool ignoreGuardWriteCycle =
false);
117 bool disposePrologCopy =
true);
123 int immWriteCycle = -1,
124 int prologImmWriteCycle = -1,
126 int immRegIndex = -1);
132 int immWriteCycle = -1,
133 int prologImmWriteCycle = -1,
135 int immRegIndex = -1);
141 int immWriteCycle = -1,
142 int prologImmWriteCycle = -1,
144 int immRegIndex = -1,
145 bool ignoreGWN =
false);
146 static std::map<MoveNode*, MoveNode*, MoveNode::Comparator>
prologMoves_;
166#ifdef CHECK_DDG_EQUALITY
168 void getDDGSnapshot();
169 void checkDDGEquality();
174 int prologDDGECount_;
176 int prologDDGNCount_;
184 int prologImmWriteCycle);
186 MoveNode& mh,
bool disposePrologCopy =
true);
189 MoveNode& mn,
int cycle,
bool ignoreGuardWriteCycle =
false);
bool usePrologMove(const MoveNode &mn)
void assignCopyToPrologEpilog(int cycle, MoveNode &mn, MoveNode &loopMN, const TTAMachine::Bus *prologBus, int prologImmWriteCycle)
bool needJumpGuard(const MoveNode &mn, int cycle)
DataDependenceGraph * prologDDG()
virtual void mightBeReady(MoveNode &mn)
const TTAMachine::FunctionUnit * sourceFU(const MoveNode &mn)
bool addJumpGuardIfNeeded(MoveNode &mn, int cycle, bool ignoreGuardWriteCycle=false)
const TTAMachine::FunctionUnit * destinationFU(const MoveNode &mn)
virtual bool canAssign(int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGWN=false)
void setJumpGuard(MoveNode &mn)
const TTAMachine::FunctionUnit * fuOfTerminal(const TTAProgram::Terminal &t)
void setPrologFUAnnos(MoveNode &prologMN, MoveNode &loopMN)
void unassignCopyFromPrologEpilog(MoveNode &mh, bool disposePrologCopy=true)
void setPrologSrcFUAnno(MoveNode &prologMN, MoveNode &loopMN)
static MoveNode * getSisterTrigger(const MoveNode &mn, const TTAMachine::Machine &mach)
void checkPrologDDG(MoveNode &prologEpilogMN)
SimpleResourceManager * prologRM() const
bool hasAmbiguousResources(MoveNode &mn) const
std::pair< MoveNode *, bool > createCopyForPrologEpilog(MoveNode &mn)
void setPrologDstFUAnno(MoveNode &prologMN, MoveNode &loopMN)
BUMoveNodeSelector & selector()
DataDependenceGraph & ddg()
const TTAMachine::RegisterFile * RFReadPortCountPreventsScheduling(const MoveNode &mn)
virtual void unassign(MoveNode &mn, bool disposePrologCopy=true)
DataDependenceGraph * rootDDG()
bool immCountPreventsScheduling(const MoveNode &mn)
bool putAlsoToPrologEpilog(int cycle, MoveNode &mn)
virtual bool isFinishFront()
int jumpGuardAvailableCycle(const MoveNode &mn)
virtual int rmLC(int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1)
const TTAMachine::Machine & targetMachine() const
bool canBeScheduled(const MoveNode &mn)
virtual int rmEC(int cycle, MoveNode &mn, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1)
static void clearPrologMoves()
MoveNodeDuplicator & duplicator() const
SimpleResourceManager & rm() const
static std::map< MoveNode *, MoveNode *, MoveNode::Comparator > prologMoves_
virtual bool assign(int cycle, MoveNode &, const TTAMachine::Bus *bus=nullptr, const TTAMachine::FunctionUnit *srcFU_=nullptr, const TTAMachine::FunctionUnit *dstFU=nullptr, const TTAMachine::Bus *prologBus=nullptr, int immWriteCycle=-1, int prologImmWriteCycle=-1, const TTAMachine::ImmediateUnit *immu=nullptr, int immRegIndex=-1, bool ignoreGuardWriteCycle=false)
BFOptimization(BF2Scheduler &sched)
void unsetJumpGuard(MoveNode &mn)
bool canBeSpeculated(const Operation &op)
void unsetJumpGuardIfNeeded(MoveNode &mn, int cycle)