OpenASIP  2.0
Public Member Functions | Protected Member Functions | List of all members
OTASimulationController Class Reference

#include <OTASimulationController.hh>

Inheritance diagram for OTASimulationController:
Inheritance graph
Collaboration diagram for OTASimulationController:
Collaboration graph

Public Member Functions

 OTASimulationController (SimulatorFrontend &frontend, const TTAMachine::Machine &machine, const TTAProgram::Program &program)
 
virtual ~OTASimulationController ()
 
- Public Member Functions inherited from SimulationController
 SimulationController (SimulatorFrontend &frontend, const TTAMachine::Machine &machine, const TTAProgram::Program &program, bool fuResourceConflictDetection=true, bool detailedSimulation=false)
 
virtual ~SimulationController ()
 
virtual void step (double count=1)
 
virtual void next (int count=1)
 
virtual void run ()
 
virtual void runUntil (UIntWord address)
 
virtual void reset ()
 
virtual InstructionAddress programCounter () const
 
virtual MachineStatemachineState (int core=-1)
 
virtual const InstructionMemoryinstructionMemory (int core=-1) const
 
virtual std::string registerFileValue (const std::string &rfName, int registerIndex=-1)
 
virtual SimValue immediateUnitRegisterValue (const std::string &iuName, int index=-1)
 
virtual SimValue FUPortValue (const std::string &fuName, const std::string &portName)
 
- Public Member Functions inherited from TTASimulationController
 TTASimulationController (SimulatorFrontend &frontend, const TTAMachine::Machine &machine, const TTAProgram::Program &program)
 
virtual ~TTASimulationController ()
 
virtual void prepareToStop (StopReason reason)
 
virtual unsigned int stopReasonCount () const
 
virtual StopReason stopReason (unsigned int index) const
 
virtual SimulationStatus state () const
 
virtual InstructionAddress lastExecutedInstruction (int coreId=-1) const
 
virtual ClockCycleCount clockCount () const
 
virtual MemorySystemmemorySystem (int coreId=-1)
 
virtual SimulatorFrontendfrontend ()
 
virtual bool automaticFinishImpossible () const
 
virtual std::set< InstructionAddressfindProgramExitPoints (const TTAProgram::Program &program, const TTAMachine::Machine &machine) const
 

Protected Member Functions

void advanceMachineCycle (unsigned pcAdd)
 
virtual bool simulateCycle ()
 
- Protected Member Functions inherited from TTASimulationController
 TTASimulationController (const TTASimulationController &)
 Copying not allowed. More...
 
TTASimulationControlleroperator= (const TTASimulationController &)
 Assignment not allowed. More...
 

Additional Inherited Members

- Public Types inherited from TTASimulationController
enum  SimulationStatus {
  STA_INITIALIZING, STA_INITIALIZED, STA_RUNNING, STA_STOPPED,
  STA_FINISHED
}
 The states of simulation. More...
 
- Protected Types inherited from SimulationController
typedef std::vector< MachineState * > MachineStateContainer
 
- Protected Types inherited from TTASimulationController
typedef std::set< StopReasonStopReasonContainer
 The container type for reasons why simulation stop was requested. More...
 
- Protected Attributes inherited from SimulationController
MachineStateContainer machineStates_
 The machine state models for the simulated cores. More...
 
std::vector< InstructionMemory * > instructionMemories_
 The instruction memory models of cores. More...
 
- Protected Attributes inherited from TTASimulationController
SimulatorFrontendfrontend_
 Reference to the simulator frontend. More...
 
const TTAMachine::MachinesourceMachine_
 The simulated Machine Object Model. More...
 
const TTAProgram::Programprogram_
 Program object model of the simulated program. More...
 
bool stopRequested_
 Flag indicating that simulation should stop. More...
 
StopReasonContainer stopReasons_
 The set of reasons the simulation was stopped. More...
 
SimulationStatus state_
 The current state of the simulation. More...
 
ClockCycleCount clockCount_
 How many clock cycles have been simulated. More...
 
std::vector< InstructionAddresslastExecutedInstruction_
 The address of the last executed instruction. More...
 
InstructionAddress initialPC_
 The address of the first executed instruction. More...
 
bool automaticFinishImpossible_
 If this is true, simulation cannot be finished automatically. More...
 
InstructionAddress firstIllegalInstructionIndex_
 The index of the first illegal instruction in the instruction sequence. More...
 

Detailed Description

Definition at line 40 of file OTASimulationController.hh.

Constructor & Destructor Documentation

◆ OTASimulationController()

OTASimulationController::OTASimulationController ( SimulatorFrontend frontend,
const TTAMachine::Machine machine,
const TTAProgram::Program program 
)

Definition at line 40 of file OTASimulationController.cc.

43  :
44  SimulationController (frontend, machine, program, false, false) {
45 }

◆ ~OTASimulationController()

OTASimulationController::~OTASimulationController ( )
virtual

Definition at line 47 of file OTASimulationController.cc.

47  {
48 }

Member Function Documentation

◆ advanceMachineCycle()

void OTASimulationController::advanceMachineCycle ( unsigned  pcAdd)
protected

◆ simulateCycle()

bool OTASimulationController::simulateCycle ( )
protectedvirtual

Simulates an instruction cycle, both its explicit and implicit instructions.

Reimplemented from SimulationController.

Definition at line 81 of file OTASimulationController.cc.

81  {
82 
83  std::vector<InstructionAddress> lastExecutedInstructions =
85 
86  bool finished = false;
87 
88  int finishedCoreCount = 0;
89 
90  const unsigned int core = 0;
94  const InstructionAddress pc = gcu.programCounter();
95 
96  try {
98 
99  bool exitPoint = false;
100  if (imem.hasInstructionAt(pc)) {
101  ExecutableInstruction& instruction = imem.instructionAt(pc);
102  instruction.execute();
103 
104  lastExecutedInstructions[core] = pc;
105 
107 
108  if (imem.hasImplicitInstructionsAt(pc)) {
109  const auto& implInstructions = imem.implicitInstructionsAt(pc);
110  for (size_t i = 0; i < implInstructions.size(); ++i) {
111  ExecutableInstruction& implInstruction =
112  *implInstructions.at(i);
113  implInstruction.execute();
114  exitPoint |= implInstruction.isExitPoint();
116  }
117  }
118 
119  exitPoint |= instruction.isExitPoint();
120  }
121 
122  // check if the instruction was a return point from the program or
123  // the next executed instruction would be sequentially over the
124  // instruction space (PC+1 would overflow out of the program)
125  if (exitPoint ||
128  ++finishedCoreCount;
129  }
130  } catch (const Exception& e) {
133  e.errorMessage());
135  return false;
136  }
137 
138  if (finishedCoreCount > 0)
139  finished = true;
140 
142 
143  lastExecutedInstruction_ = lastExecutedInstructions;
144 
145  // this is the instruction count in case of OTA
146  ++clockCount_;
147 
148  if (finished) {
150  stopRequested_ = true;
151  return false;
152  }
153 
156  return true;
157 }

References advanceMachineCycle(), MachineState::clearBuses(), TTASimulationController::clockCount_, Exception::errorMessage(), SimulatorFrontend::eventHandler(), ExecutableInstruction::execute(), TTASimulationController::firstIllegalInstructionIndex_, TTASimulationController::frontend_, MachineState::gcuState(), Informer::handleEvent(), InstructionMemory::hasImplicitInstructionsAt(), InstructionMemory::hasInstructionAt(), InstructionMemory::implicitInstructionsAt(), InstructionMemory::instructionAt(), SimulationController::instructionMemories_, ExecutableInstruction::isExitPoint(), TTASimulationController::lastExecutedInstruction_, SimulationController::machineState(), SimulationController::machineStates_, TTASimulationController::prepareToStop(), GCUState::programCounter(), SimulatorFrontend::reportSimulatedProgramError(), SimulatorFrontend::RES_FATAL, SimulationEventHandler::SE_CYCLE_END, SimulationEventHandler::SE_NEW_INSTRUCTION, MachineState::setFinished(), SRE_RUNTIME_ERROR, TTASimulationController::STA_FINISHED, TTASimulationController::state_, and TTASimulationController::stopRequested_.

Here is the call graph for this function:

The documentation for this class was generated from the following files:
TTASimulationController::memorySystem
virtual MemorySystem & memorySystem(int coreId=-1)
Definition: TTASimulationController.cc:171
SimulationController::SimulationController
SimulationController(SimulatorFrontend &frontend, const TTAMachine::Machine &machine, const TTAProgram::Program &program, bool fuResourceConflictDetection=true, bool detailedSimulation=false)
Definition: SimulationController.cc:87
ExecutableInstruction
Definition: ExecutableInstruction.hh:49
InstructionAddress
UInt32 InstructionAddress
Definition: BaseType.hh:175
InstructionMemory::hasInstructionAt
bool hasInstructionAt(InstructionAddress addr) const
Definition: InstructionMemory.cc:117
ExecutableInstruction::execute
void execute()
GCUState
Definition: GCUState.hh:46
machine
TTAMachine::Machine * machine
the architecture definition of the estimated processor
Definition: EstimatorCmdLineUI.cc:59
FUState::endClock
virtual void endClock()
Definition: FUState.cc:122
InstructionMemory::implicitInstructionsAt
const InstructionContainer & implicitInstructionsAt(InstructionAddress addr) const
Definition: InstructionMemory.cc:128
MachineState::gcuState
GCUState & gcuState()
Definition: MachineState.cc:103
MachineState::clearBuses
void clearBuses()
GCUState::programCounter
InstructionAddress & programCounter()
MachineState::setFinished
void setFinished(bool finished=true)
Definition: MachineState.hh:106
TTASimulationController::prepareToStop
virtual void prepareToStop(StopReason reason)
Definition: TTASimulationController.cc:90
MachineState::endClockOfAllFUStates
void endClockOfAllFUStates()
InstructionMemory
Definition: InstructionMemory.hh:54
MemorySystem::advanceClockOfLocalMemories
void advanceClockOfLocalMemories()
MachineState::advanceClockOfAllFUStates
void advanceClockOfAllFUStates()
TTASimulationController::state_
SimulationStatus state_
The current state of the simulation.
Definition: TTASimulationController.hh:147
TTASimulationController::frontend_
SimulatorFrontend & frontend_
Reference to the simulator frontend.
Definition: TTASimulationController.hh:135
SimulationController::instructionMemories_
std::vector< InstructionMemory * > instructionMemories_
The instruction memory models of cores.
Definition: SimulationController.hh:92
MachineState
Definition: MachineState.hh:61
MemorySystem::advanceClockOfSharedMemories
void advanceClockOfSharedMemories()
TTASimulationController::STA_FINISHED
@ STA_FINISHED
Simulation ended after executing the last instruction.
Definition: TTASimulationController.hh:77
InstructionMemory::instructionAt
ExecutableInstruction & instructionAt(InstructionAddress address)
SimulationEventHandler::SE_CYCLE_END
@ SE_CYCLE_END
Generated before advancing the simulator clock at the end of a simulation cycle.
Definition: SimulationEventHandler.hh:50
TTASimulationController::lastExecutedInstruction_
std::vector< InstructionAddress > lastExecutedInstruction_
The address of the last executed instruction.
Definition: TTASimulationController.hh:151
TTASimulationController::stopRequested_
bool stopRequested_
Flag indicating that simulation should stop.
Definition: TTASimulationController.hh:142
SRE_RUNTIME_ERROR
@ SRE_RUNTIME_ERROR
A fatal runtime error occured in the simulated program.
Definition: SimulatorConstants.hh:68
SimulatorFrontend::RES_FATAL
@ RES_FATAL
Fatal runtime error, there is a serious error in the simulated program, thus it makes no sense to go ...
Definition: SimulatorFrontend.hh:95
FUState::isIdle
bool isIdle()
Exception
Definition: Exception.hh:54
GCUState::advanceClock
virtual void advanceClock()
Definition: GCUState.cc:98
MemorySystem
Definition: MemorySystem.hh:55
ExecutableInstruction::isExitPoint
bool isExitPoint() const
OTASimulationController::advanceMachineCycle
void advanceMachineCycle(unsigned pcAdd)
Definition: OTASimulationController.cc:52
TTASimulationController::frontend
virtual SimulatorFrontend & frontend()
Definition: TTASimulationController.cc:181
Exception::errorMessage
std::string errorMessage() const
Definition: Exception.cc:123
TTASimulationController::clockCount_
ClockCycleCount clockCount_
How many clock cycles have been simulated.
Definition: TTASimulationController.hh:149
InstructionMemory::hasImplicitInstructionsAt
bool hasImplicitInstructionsAt(InstructionAddress addr) const
Definition: InstructionMemory.cc:123
TTASimulationController::firstIllegalInstructionIndex_
InstructionAddress firstIllegalInstructionIndex_
The index of the first illegal instruction in the instruction sequence.
Definition: TTASimulationController.hh:158
SimulatorFrontend::memorySystem
MemorySystem & memorySystem(int coreId=-1)
Definition: SimulatorFrontend.cc:2121
SimulatorFrontend::eventHandler
SimulationEventHandler & eventHandler()
Definition: SimulatorFrontend.cc:2260
SimulationController::machineStates_
MachineStateContainer machineStates_
The machine state models for the simulated cores.
Definition: SimulationController.hh:90
program
find Finds info of the inner loops in the program
Definition: InnerLoopFinder.cc:80
Informer::handleEvent
void handleEvent(int event)
SimulationController::machineState
virtual MachineState & machineState(int core=-1)
Definition: SimulationController.cc:145
SimulatorFrontend::reportSimulatedProgramError
void reportSimulatedProgramError(RuntimeErrorSeverity severity, const std::string &description)
Definition: SimulatorFrontend.cc:2304
MachineState::advanceClockOfAllGuardStates
void advanceClockOfAllGuardStates()
SimulationEventHandler::SE_NEW_INSTRUCTION
@ SE_NEW_INSTRUCTION
Generated before executing a new instructon.
Definition: SimulationEventHandler.hh:48