OpenASIP 2.2
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BFRegCopyBefore.cc
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1/*
2 Copyright (c) 2002-2014 Tampere University.
3
4 This file is part of TTA-Based Codesign Environment (TCE).
5
6 Permission is hereby granted, free of charge, to any person obtaining a
7 copy of this software and associated documentation files (the "Software"),
8 to deal in the Software without restriction, including without limitation
9 the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 and/or sell copies of the Software, and to permit persons to whom the
11 Software is furnished to do so, subject to the following conditions:
12
13 The above copyright notice and this permission notice shall be included in
14 all copies or substantial portions of the Software.
15
16 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 DEALINGS IN THE SOFTWARE.
23 */
24
25/**
26 * @file BFRegCopyBefore.cc
27 *
28 * Definition of BFRegCopyBefore class
29 *
30 * Creates a register-to-register copy before a move, modifying the source
31 * of the original move into the temporaty register and making the source
32 * of the temp move the original souce register.
33 *
34 * Used for temp-reg-copies of operand moves.
35 *
36 * @author Heikki Kultala 2014-2020(heikki.kultala-no.spam-tuni.fi)
37 * @note rating: red
38 */
39
40#include "BFRegCopyBefore.hh"
41#include "RegisterFile.hh"
42#include "TerminalRegister.hh"
43#include "BF2Scheduler.hh"
44#include "MoveNode.hh"
45#include "Move.hh"
46#include "BFRemoveEdge.hh"
47#include "BFConnectNodes.hh"
48
49
50bool
52
53 std::set<const TTAMachine::RegisterFile*,
56
57 // cannot create reg copy if no temp regs available.
58 if (rfs.empty()) {
59 return false;
60 }
61
62 const TTAMachine::RegisterFile& rf = **rfs.rbegin();
63
64 int lastRegisterIndex = rf.size()-1;
65 TTAMachine::Port* dstRFPort = rf.firstWritePort();
66 TTAMachine::Port* srcRFPort = rf.firstReadPort();
67
69 new TTAProgram::TerminalRegister(*dstRFPort, lastRegisterIndex);
70
72 new TTAProgram::TerminalRegister(*srcRFPort, lastRegisterIndex);
73
74 regCopy_->move().setDestination(tempWrite);
75 mn_.move().setSource(tempRead);
76
77 auto iEdges = ddg().rootGraph()->inEdges(mn_);
78 for (auto iEdge : iEdges) {
79 if (!iEdge->isRegisterOrRA() || iEdge->headPseudo()) {
80 continue;
81 }
82
83 //copy guard use edge to the regcopy.
84 if (iEdge->guardUse() &&
85 iEdge->dependenceType() == DataDependenceEdge::DEP_RAW) {
86 MoveNode& tail = ddg().rootGraph()->tailNode(*iEdge);
88 new BFConnectNodes(sched_, tail, *regCopy_, iEdge, true));
89 } else if (iEdge->isRAW()) {
90 MoveNode& tail = ddg().rootGraph()->tailNode(*iEdge);
91 runPostChild(new BFRemoveEdge(sched_, tail, mn_, *iEdge));
92 runPostChild(new BFConnectNodes(sched_, tail, *regCopy_, iEdge));
93 }
94 }
95
96 auto oEdges = ddg().rootGraph()->outEdges(mn_);
97 for (auto oEdge : oEdges) {
98 if (!oEdge->isRegisterOrRA() || oEdge->tailPseudo()) {
99 continue;
100 }
101 if (oEdge->dependenceType() == DataDependenceEdge::DEP_WAR &&
102 !oEdge->guardUse()) {
103 MoveNode& head = ddg().rootGraph()->headNode(*oEdge);
104 runPostChild(new BFRemoveEdge(sched_, mn_, head, *oEdge));
105 runPostChild(new BFConnectNodes(sched_, *regCopy_, head, oEdge));
106 }
107 }
108
109 TCEString tempRegName = rf.name() + '.' +
110 Conversion::toString(lastRegisterIndex);
111
112 DataDependenceEdge* newEdge =
115 DataDependenceEdge::DEP_RAW, tempRegName);
116
118
120 *regCopy_, mn_, rf, lastRegisterIndex,
121 tempRegName, bbn, ii()!= 0);
122
123 return true;
124}
125
std::set< const TTAMachine::RegisterFile *, TTAMachine::MachinePart::Comparator > possibleTempRegRFs(const MoveNode &mn, bool tempRegAfter, const TTAMachine::RegisterFile *forbiddenRF=nullptr)
unsigned int ii() const
BF2Scheduler & sched_
DataDependenceGraph & ddg()
const TTAMachine::RegisterFile * forbiddenRF_
bool splitMove(BasicBlockNode &bbn)
MoveNode * regCopy_
Definition BFRegCopy.hh:70
void createAntidepsForReg(MoveNode &firstMove, MoveNode &lastMove, const TTAMachine::RegisterFile &rf, int index, TCEString regName, BasicBlockNode &bbn, bool loopScheduling)
Definition BFRegCopy.cc:99
MoveNode & mn_
Definition BFRegCopy.hh:69
BoostGraph * rootGraph()
virtual Node & headNode(const Edge &edge) const
virtual EdgeSet outEdges(const Node &node) const
virtual Node & tailNode(const Edge &edge) const
virtual EdgeSet inEdges(const Node &node) const
static std::string toString(const T &source)
TTAProgram::Move & move()
bool runPostChild(Reversible *preChild)
virtual int size() const
virtual TCEString name() const
Port * firstReadPort() const
Port * firstWritePort() const
void setSource(Terminal *src)
Definition Move.cc:312
Terminal & source() const
Definition Move.cc:302
void setDestination(Terminal *dst)
Definition Move.cc:333
virtual Terminal * copy() const =0