BlocksConnectIC Class Reference

Inheritance diagram for BlocksConnectIC:

Collaboration diagram for BlocksConnectIC:

Protected Member Functions
TTAMachine::Segment *	createBus (TTAMachine::Machine *mach, int width)
Protected Member Functions inherited from DesignSpaceExplorerPlugin
	DesignSpaceExplorerPlugin ()
void	checkParameters () const
Protected Member Functions inherited from DesignSpaceExplorer
TTAProgram::Program *	schedule (const std::string applicationFile, TTAMachine::Machine &machine, TCEString paramOptions="-O3")
const ExecutionTrace *	simulate (const TTAProgram::Program &program, const TTAMachine::Machine &machine, const TestApplication &testApplication, const ClockCycleCount &maxCycles, ClockCycleCount &runnedCycles, const bool tracing, const bool useCompiledSimulation=false, std::vector< ClockCycleCount > *executionCounts=NULL)

Private Member Functions
	PLUGIN_DESCRIPTION ("Arranges architecture FUs into a Blocks-like interconnection")
	BlocksConnectIC ()
virtual bool	requiresStartingPointArchitecture () const
virtual bool	producesArchitecture () const
virtual bool	requiresHDB () const
virtual bool	requiresSimulationData () const
virtual bool	requiresApplication () const
virtual std::vector< RowID >	explore (const RowID &configurationID, const unsigned int &)

Additional Inherited Members
Public Types inherited from DesignSpaceExplorerPlugin
typedef std::pair< std::string, ExplorerPluginParameter >	Parameter
typedef std::map< std::string, ExplorerPluginParameter >	ParameterMap
typedef std::map< std::string, ExplorerPluginParameter >::iterator	PMIt
typedef std::map< std::string, ExplorerPluginParameter >::const_iterator	PMCIt
Public Member Functions inherited from DesignSpaceExplorerPlugin
virtual std::string	description () const
void	addParameter (TCEString name, ExplorerPluginParameterType type, bool compulsory=true, TCEString defaultValue="", TCEString description="")
template<typename T >
void	readCompulsoryParameter (const std::string paramName, T &param) const
template<typename T >
void	readOptionalParameter (const std::string paramName, T &param) const
template<typename RT >
RT	parameterValue (const std::string &paramName) const
virtual	~DesignSpaceExplorerPlugin ()
virtual void	giveParameter (const std::string &name, const std::string &value)
virtual std::string	name () const
virtual void	setPluginName (const std::string &pluginName)
virtual bool	hasParameter (const std::string &paramName) const
ParameterMap	parameters () const
virtual bool	booleanValue (const std::string &parameter) const
Public Member Functions inherited from DesignSpaceExplorer
	DesignSpaceExplorer ()
virtual	~DesignSpaceExplorer ()
virtual void	setDSDB (DSDBManager &dsdb)
virtual bool	evaluate (const DSDBManager::MachineConfiguration &configuration, CostEstimates &results=dummyEstimate_, bool estimate=false)
virtual DSDBManager &	db ()
std::vector< DesignSpaceExplorerPlugin * >	getPlugins ()
RowID	createImplementationAndStore (const DSDBManager::MachineConfiguration &conf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")
bool	createImplementation (const DSDBManager::MachineConfiguration &conf, DSDBManager::MachineConfiguration &newConf, const double &frequency=0.0, const double &maxArea=0.0, const bool &createEstimates=true, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb")
IDF::MachineImplementation *	selectComponents (const TTAMachine::Machine &mach, const double &frequency=0.0, const double &maxArea=0.0, const std::string &icDec="DefaultICDecoder", const std::string &icDecHDB="asic_130nm_1.5V.hdb") const
void	createEstimateData (const TTAMachine::Machine &mach, const IDF::MachineImplementation &idf, CostEstimator::AreaInGates &area, CostEstimator::DelayInNanoSeconds &longestPathDelay)
RowID	addConfToDSDB (const DSDBManager::MachineConfiguration &conf)
Static Public Member Functions inherited from DesignSpaceExplorer
static DesignSpaceExplorerPlugin *	loadExplorerPlugin (const std::string &pluginName, DSDBManager *dsdb=NULL)
Protected Attributes inherited from DesignSpaceExplorerPlugin
std::string	pluginName_
	the name of the explorer plugin
ParameterMap	parameters_
	Parameters for the plugin.

Detailed Description

Definition at line 51 of file BlocksConnectIC.cc.

Constructor & Destructor Documentation

BlocksConnectIC()

BlocksConnectIC::BlocksConnectIC ( )

inlineprivate

Definition at line 55 of file BlocksConnectIC.cc.

: DesignSpaceExplorerPlugin() {}

Member Function Documentation

createBus()

TTAMachine::Segment * BlocksConnectIC::createBus ( TTAMachine::Machine *  mach, int  width  )

inlineprotected

Creates a bus with specified bit width.

Parameters

mach	Machine for that bus.
width	Bit width of a bus.

Returns

Bus segment.

Definition at line 263 of file BlocksConnectIC.cc.

                                                  {
        int idx = mach->busNavigator().count();
        TCEString busName = "B" + Conversion::toString(idx);
        Bus* newBus = new Bus(busName, width, 0, Machine::SIGN);
        TTAMachine::Segment* newSegment =
            new TTAMachine::Segment(busName, *newBus);
        mach->addBus(*newBus);
        return newSegment;
    }

References TTAMachine::Machine::addBus(), TTAMachine::Machine::busNavigator(), TTAMachine::Machine::Navigator< ComponentType >::count(), TTAMachine::Machine::SIGN, and Conversion::toString().

Referenced by explore().

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explore()

virtual std::vector< RowID > BlocksConnectIC::explore ( const RowID &  configurationID, const unsigned int &    )

inlineprivatevirtual

Arranges architecture FUs into a Blocks-like interconnection. This is typically as baseline for running the BusMergeMinimizer and RFPortMergeMinimizer plugins. Reference: Blocks, a reconfigurable architecture combining energy efficiency and flexibility. Wijtvliet, M. (2020). Technische Universiteit Eindhoven.

Reimplemented from DesignSpaceExplorerPlugin.

Definition at line 88 of file BlocksConnectIC.cc.

                                                               {
        std::vector<RowID> result;
 
        DSDBManager& dsdb = db();
        DSDBManager::MachineConfiguration conf;
        conf.hasImplementation = false;
        TTAMachine::Machine* mach = NULL;
 
        // load the adf from file or from dsdb
        try {
            conf = dsdb.configuration(configurationID);
            mach = dsdb.architecture(conf.architectureID);
        } catch (const Exception& e) {
            std::ostringstream msg(std::ostringstream::out);
            Application::errorStream()
                << "Error loading the adf." << std::endl;
            return result;
        }
        assert(mach != NULL);
 
        // Remove unconnected sockets
        TTAMachine::Machine::SocketNavigator socketNavi =
            mach->socketNavigator();
        for (int i = 0; i < socketNavi.count(); i++) {
            if (socketNavi.item(i)->portCount() == 0) {
                mach->removeSocket(*socketNavi.item(i));
                i--;
            }
        }
 
        // Wiping buses also destroys socket directions (input/output)
        // and there seems to be no other way to find out whether a port
        // is input or output.
        // Save the directions before wiping the buses
        for (int i = 0; i < socketNavi.count(); i++) {
            Socket* sock = socketNavi.item(i);
            // Restrict to 32-bit bus
            int width = sock->port(0)->width();
            assert(width == 32 && "ADF has Socket != 32-bit");
        }
 
        // save directions and sockets
        std::vector<Socket::Direction> directions;
        std::vector<int> readSockets, writeSockets;
        int gcu_ra_input = -1, gcu_ra_output = -1, gcu_pc = -1;
 
        for (int i = 0; i < socketNavi.count(); i++) {
            Socket* sock = socketNavi.item(i);
            Socket::Direction dir = sock->direction();
            directions.push_back(dir);
 
            // Allow only 2-output buffers at max
            int port_count = sock->portCount();
            assert(
                port_count > 0 && port_count <= 2 &&
                "Socket is not connected or connected to more than 2 FUs");
            // Separate GCU RA socket for special handling
            Unit* parentUnit = sock->port(0)->parentUnit();
            ControlUnit* gcu = dynamic_cast<ControlUnit*>(parentUnit);
            if (dir == Socket::INPUT) {
                if (gcu != NULL && sock->port(0)->name() == "ra") {
                    gcu_ra_input = i;
                } else {
                    readSockets.push_back(i);
                }
            } else {
                writeSockets.push_back(i);
                if (gcu != NULL && sock->port(0)->name() == "ra") {
                    gcu_ra_output = i;
                }
            }
        }
 
        // Wipe all existing buses
        TTAMachine::Machine::BusNavigator busNavi = mach->busNavigator();
        for (int i = 0; i < busNavi.count(); i++) {
            mach->removeBus(*busNavi.item(i));
            i--;
        }
 
        // Add new bus for each input port (i.e. We mux the 4xinput via single
        // bus)
        int busCount = 0;
        std::vector<int> readBuses, writeBuses;
 
        /* initialize random seed: */
        std::srand(time(NULL));
        for (unsigned int i = 0; i < readSockets.size(); i++) {
            int rd_soc_idx = readSockets[i];
            Socket* input_sock = socketNavi.item(rd_soc_idx);
 
            // Attach 32-bit bus segment
            TTAMachine::Segment* newSegment = createBus(mach, 32);
            newSegment->attachSocket(*input_sock);
            input_sock->setDirection(directions[rd_soc_idx]);
            // Handle special case for GCU
            Unit* parentUnit = input_sock->port(0)->parentUnit();
            if (dynamic_cast<ControlUnit*>(parentUnit) != NULL &&
                input_sock->port(0)->name() == "pc") {
                assert(gcu_ra_input != -1);
                Socket* ra_sock = socketNavi.item(gcu_ra_input);
                newSegment->attachSocket(*ra_sock);
                ra_sock->setDirection(directions[gcu_ra_input]);
                gcu_pc = rd_soc_idx;
            }
            readBuses.push_back(busCount++);
 
            // Make connections to the socket (maximum 4 connections)
            int output_socket_count = writeSockets.size();
            int req_connections = std::min(output_socket_count, 4);
            while (req_connections > 0) {
                // Select random FU output port
                int wr_soc_idx =
                    writeSockets[std::rand() % writeSockets.size()];
                Socket* output_sock = socketNavi.item(wr_soc_idx);
 
                // Check if we already have connections
                if (newSegment->isConnectedTo(*output_sock)) {
                    continue;
                }
 
                // No connections to this port yet; make connection
                newSegment->attachSocket(*output_sock);
                output_sock->setDirection(directions[wr_soc_idx]);
                req_connections--;
            }
        }
 
        // Create instruction template for imm unit
        if (mach->immediateUnitNavigator().count() != 0) {
            ImmediateUnit* immu = mach->immediateUnitNavigator().item(0);
 
            while (mach->instructionTemplateNavigator().count() > 0) {
                mach->deleteInstructionTemplate(
                    *mach->instructionTemplateNavigator().item(0));
            }
 
            new InstructionTemplate("no_limm", *mach);
 
            InstructionTemplate* limm =
                new InstructionTemplate("limm", *mach);
            TTAMachine::Segment* newSegment = createBus(mach, 32);
            Bus* newBus = newSegment->parentBus();
 
            limm->addSlot(newBus->name(), 32, *immu);
 
            // Attch GCU's RA and PC sockets (We do not have explicit RA port
            // in Blocks; so, this is just to emulate the effect of single
            // port.)
            assert(gcu_ra_input != -1);
            newSegment->attachSocket(*socketNavi.item(gcu_ra_input));
            assert(gcu_ra_output != -1);
            newSegment->attachSocket(*socketNavi.item(gcu_ra_output));
            assert(gcu_pc != -1);
            newSegment->attachSocket(*socketNavi.item(gcu_pc));
        }
 
        // add machine to configuration
        conf.architectureID = dsdb.addArchitecture(*mach);
 
        // add new configuration to dsdb
        RowID confID = dsdb.addConfiguration(conf);
        result.push_back(confID);
        return result;
    }

References DSDBManager::addArchitecture(), DSDBManager::addConfiguration(), TTAMachine::InstructionTemplate::addSlot(), DSDBManager::architecture(), DSDBManager::MachineConfiguration::architectureID, assert, TTAMachine::Segment::attachSocket(), TTAMachine::Machine::busNavigator(), DSDBManager::configuration(), TTAMachine::Machine::Navigator< ComponentType >::count(), createBus(), DesignSpaceExplorer::db(), TTAMachine::Machine::deleteInstructionTemplate(), TTAMachine::Socket::direction(), Application::errorStream(), DSDBManager::MachineConfiguration::hasImplementation, TTAMachine::Machine::immediateUnitNavigator(), TTAMachine::Socket::INPUT, TTAMachine::Machine::instructionTemplateNavigator(), TTAMachine::Segment::isConnectedTo(), TTAMachine::Machine::Navigator< ComponentType >::item(), TTAMachine::Component::name(), TTAMachine::Port::name(), TTAMachine::Segment::parentBus(), TTAMachine::Port::parentUnit(), TTAMachine::Socket::port(), TTAMachine::Socket::portCount(), TTAMachine::Machine::removeBus(), TTAMachine::Machine::removeSocket(), TTAMachine::Socket::setDirection(), TTAMachine::Machine::socketNavigator(), and TTAMachine::Port::width().

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PLUGIN_DESCRIPTION()

BlocksConnectIC::PLUGIN_DESCRIPTION ( "Arranges architecture FUs into a Blocks-like interconnection"  )

private

producesArchitecture()

virtual bool BlocksConnectIC::producesArchitecture ( ) const

inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 62 of file BlocksConnectIC.cc.

                                 {
        return true;
    }

requiresApplication()

virtual bool BlocksConnectIC::requiresApplication ( ) const

inlineprivatevirtual

Reimplemented from DesignSpaceExplorerPlugin.

Definition at line 74 of file BlocksConnectIC.cc.

                                {
        return false;
    }

requiresHDB()

virtual bool BlocksConnectIC::requiresHDB ( ) const

inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 66 of file BlocksConnectIC.cc.

                        {
        return false;
    }

requiresSimulationData()

virtual bool BlocksConnectIC::requiresSimulationData ( ) const

inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 70 of file BlocksConnectIC.cc.

                                   {
        return false;
    }

requiresStartingPointArchitecture()

virtual bool BlocksConnectIC::requiresStartingPointArchitecture ( ) const

inlineprivatevirtual

Implements DesignSpaceExplorerPlugin.

Definition at line 58 of file BlocksConnectIC.cc.

                                              {
        return true;
    }

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The documentation for this class was generated from the following file:

• BlocksConnectIC.cc