LoopPrologAndEpilogBuilder Class Reference

#include <LoopPrologAndEpilogBuilder.hh>

Collaboration diagram for LoopPrologAndEpilogBuilder:

Public Member Functions
	LoopPrologAndEpilogBuilder ()
virtual	~LoopPrologAndEpilogBuilder ()
virtual int	build (DataDependenceGraph &ddg, SimpleResourceManager &rm, ControlFlowGraph &cfg, BasicBlockNode &loopBBN, int endCycle=-1, bool createEpilog=true)
BasicBlockNode *	addPrologFromRM (SimpleResourceManager &prologRM, SimpleResourceManager &loopRM, ControlFlowGraph &cfg, BasicBlockNode &loopBBN)
BasicBlockNode *	addEpilogFromRM (SimpleResourceManager &prologEpilogRM, int ii, ControlFlowGraph &cfg, BasicBlockNode &loopBBN)

Private Member Functions
void	moveJumpDestination (TTAProgram::InstructionReferenceManager &irm, BasicBlockNode &tail, BasicBlockNode &dst, ControlFlowEdge &jumpEdge)
void	addPrologIntoCfg (ControlFlowGraph &cfg, BasicBlockNode &prologBBN, BasicBlockNode &loopBBN)
void	addEpilogIntoCfg (ControlFlowGraph &cfg, BasicBlockNode &epilogBBN, BasicBlockNode &loopBBN)
bool	optimizeProlog (TTAProgram::BasicBlock &prolog)
bool	optimizeEpilog (TTAProgram::BasicBlock &epilog)

Detailed Description

Classes that implement this interface are able to software bypass moves.

Definition at line 54 of file LoopPrologAndEpilogBuilder.hh.

Constructor & Destructor Documentation

LoopPrologAndEpilogBuilder()

LoopPrologAndEpilogBuilder::LoopPrologAndEpilogBuilder

(

)

Definition at line 56 of file LoopPrologAndEpilogBuilder.cc.

                                                       {
}

~LoopPrologAndEpilogBuilder()

LoopPrologAndEpilogBuilder::~LoopPrologAndEpilogBuilder ( )

virtual

Definition at line 59 of file LoopPrologAndEpilogBuilder.cc.

                                                        {
}

Member Function Documentation

addEpilogFromRM()

BasicBlockNode * LoopPrologAndEpilogBuilder::addEpilogFromRM	(	SimpleResourceManager &	prologEpilogRM,
		int	ii,
		ControlFlowGraph &	cfg,
		BasicBlockNode &	loopBBN
	)

Definition at line 448 of file LoopPrologAndEpilogBuilder.cc.

                                                            {
 
    TTAProgram::BasicBlock* epilogBB = new TTAProgram::BasicBlock;
    BasicBlockNode* epilogNode = new BasicBlockNode(*epilogBB);
 
    if (Application::verboseLevel() > 1) {
        Application::logStream()
            << "Copying epilog rm to bb" << epilogNode->toString()
            << std::endl;
    }
 
    for (int i = BF2Scheduler::PROLOG_CYCLE_BIAS + ii;
         i <= prologEpilogRM.largestCycle(); i++) {
        TTAProgram::Instruction* newInstruction =
            prologEpilogRM.instruction(i);
        prologEpilogRM.loseInstructionOwnership(i);
        epilogBB->add(newInstruction);
    }
    if (optimizeEpilog(*epilogBB)) {
        addEpilogIntoCfg(cfg, *epilogNode, loopBBN);
        epilogNode->setScheduled();
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "epilog added to cfg" << epilogNode->toString() << std::endl;
 
            Application::logStream()
                << "Disassembly of epilog" << std::endl <<
                epilogBB->disassembly() << std::endl;
        }
    } else {
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "epilog empty, not added to cfg." << std::endl;
        }
        delete epilogNode;
    }
 
    return epilogNode;
 
}

References TTAProgram::CodeSnippet::add(), addEpilogIntoCfg(), TTAProgram::CodeSnippet::disassembly(), SimpleResourceManager::instruction(), SimpleResourceManager::largestCycle(), Application::logStream(), SimpleResourceManager::loseInstructionOwnership(), optimizeEpilog(), BF2Scheduler::PROLOG_CYCLE_BIAS, BasicBlockNode::setScheduled(), BasicBlockNode::toString(), and Application::verboseLevel().

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addEpilogIntoCfg()

void LoopPrologAndEpilogBuilder::addEpilogIntoCfg ( ControlFlowGraph &  cfg, BasicBlockNode &  epilogBBN, BasicBlockNode &  loopBBN  )

private

Adds an epilog into control flow graph.

Creates the node and fixed edges.

Parameters

cfg	cfg where to add the epilog
prologBB	bb which contains the epilog
loopBBN	node of cfg which contains the loop

Definition at line 166 of file LoopPrologAndEpilogBuilder.cc.

                             {
 
    cfg.addNode(epilogBBN);
    assert(cfg.outDegree(loopBBN) == 2);
 
    for (int i = 0; i < cfg.outDegree(loopBBN); i++) {
        ControlFlowEdge& loopExitEdge = cfg.outEdge(loopBBN,i);
        if (!loopExitEdge.isFallThroughEdge()) {
            continue;
        }
        BasicBlockNode& succNode = cfg.headNode(loopExitEdge);
        cfg.moveInEdge(succNode, epilogBBN, loopExitEdge);
        cfg.connectNodes(
            epilogBBN, succNode, *(new ControlFlowEdge(
                                       ControlFlowEdge::CFLOW_EDGE_NORMAL,
                                       ControlFlowEdge::CFLOW_EDGE_FALLTHROUGH
                                       )));
 
        return;
    }
    assert(false&&"Loop exit fall-thru not in ddg!");
}

References BoostGraph< GraphNode, GraphEdge >::addNode(), assert, ControlFlowEdge::CFLOW_EDGE_FALLTHROUGH, ControlFlowEdge::CFLOW_EDGE_NORMAL, BoostGraph< GraphNode, GraphEdge >::connectNodes(), BoostGraph< GraphNode, GraphEdge >::headNode(), ControlFlowEdge::isFallThroughEdge(), BoostGraph< GraphNode, GraphEdge >::moveInEdge(), BoostGraph< GraphNode, GraphEdge >::outDegree(), and BoostGraph< GraphNode, GraphEdge >::outEdge().

Referenced by addEpilogFromRM(), and build().

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addPrologFromRM()

BasicBlockNode * LoopPrologAndEpilogBuilder::addPrologFromRM	(	SimpleResourceManager &	prologRM,
		SimpleResourceManager &	loopRM,
		ControlFlowGraph &	cfg,
		BasicBlockNode &	loopBBN
	)

Stupid immediates still have to be copied from the main loop :(

Definition at line 408 of file LoopPrologAndEpilogBuilder.cc.

                                                    {
 
    int startCycle = prologRM.smallestCycle();
 
    TTAProgram::BasicBlock* prologBB = new TTAProgram::BasicBlock;
    BasicBlockNode* prologNode = new BasicBlockNode(*prologBB);
 
    if (Application::verboseLevel() > 1) {
        Application::logStream()
            << "Copying prolog rm to bb" << prologNode->toString()
            << " Start cycle: " << startCycle << std::endl;
    }
    BasicBlockPass::copyRMToBB(prologRM, *prologBB, prologRM.machine(),
                               cfg.instructionReferenceManager(),
                               loopRM.initiationInterval()-1
                               + BF2Scheduler::PROLOG_CYCLE_BIAS);
 
    if (optimizeProlog(*prologBB)) {
        addPrologIntoCfg(cfg, *prologNode, loopBBN);
        prologNode->setScheduled();
 
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "Prolog added to cfg" << prologNode->toString() << std::endl
                << "Disassembly of prolog" << std::endl <<
                prologBB->disassembly() << std::endl;
        }
    } else {
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "Empty prolog, not added to cfg" << std::endl;
        }
        delete prologNode;
    }
    return prologNode;
}

References addPrologIntoCfg(), BasicBlockPass::copyRMToBB(), TTAProgram::CodeSnippet::disassembly(), SimpleResourceManager::initiationInterval(), ControlFlowGraph::instructionReferenceManager(), Application::logStream(), ResourceManager::machine(), optimizeProlog(), BF2Scheduler::PROLOG_CYCLE_BIAS, BasicBlockNode::setScheduled(), SimpleResourceManager::smallestCycle(), BasicBlockNode::toString(), and Application::verboseLevel().

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addPrologIntoCfg()

void LoopPrologAndEpilogBuilder::addPrologIntoCfg ( ControlFlowGraph &  cfg, BasicBlockNode &  prologBBN, BasicBlockNode &  loopBBN  )

private

Adds a prolog into control flow graph.

Creates the node and fixed edges and instruction references.

Parameters

cfg	cfg where to add the prolog
prologBB	bb which contains the prolog
loopBBN	node of cfg which contains the loop

Definition at line 120 of file LoopPrologAndEpilogBuilder.cc.

                             {
 
    if (Application::verboseLevel() > 1) {
        std::cerr << "adding prolog into cfg" << std::endl;
    }
    cfg.addNode(prologBBN);
 
    // update incoming cfg edges to point into prolog
    for (int i = 0; i < cfg.inDegree(loopBBN); i++) {
        ControlFlowEdge&e = cfg.inEdge(loopBBN,i);
        BasicBlockNode& tail = cfg.tailNode(e);
        if (&tail != &loopBBN) {
            cfg.moveInEdge(loopBBN, prologBBN,e);
            i--;
            if (e.isJumpEdge()) {
                if (Application::verboseLevel() > 1) {
                    std::cerr << "\tmoving jump into loop into prolog"
                              << std::endl;
                }
                moveJumpDestination(cfg.instructionReferenceManager(),
                                    tail, prologBBN, e);
            }
        }
    }
 
    // connect prolog and loop
    cfg.connectNodes(
        prologBBN, loopBBN, *(new ControlFlowEdge(
            ControlFlowEdge::CFLOW_EDGE_NORMAL,
            ControlFlowEdge::CFLOW_EDGE_FALLTHROUGH)));
 
}

References BoostGraph< GraphNode, GraphEdge >::addNode(), ControlFlowEdge::CFLOW_EDGE_FALLTHROUGH, ControlFlowEdge::CFLOW_EDGE_NORMAL, BoostGraph< GraphNode, GraphEdge >::connectNodes(), BoostGraph< GraphNode, GraphEdge >::inDegree(), BoostGraph< GraphNode, GraphEdge >::inEdge(), ControlFlowGraph::instructionReferenceManager(), ControlFlowEdge::isJumpEdge(), BoostGraph< GraphNode, GraphEdge >::moveInEdge(), moveJumpDestination(), BoostGraph< GraphNode, GraphEdge >::tailNode(), and Application::verboseLevel().

Referenced by addPrologFromRM(), and build().

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build()

int LoopPrologAndEpilogBuilder::build ( DataDependenceGraph &  ddg, SimpleResourceManager &  rm, ControlFlowGraph &  cfg, BasicBlockNode &  loopBBN, int  endCycle = -1, bool  createEpilog = true  )

virtual

Definition at line 192 of file LoopPrologAndEpilogBuilder.cc.

                       {
 
    if (Application::verboseLevel() > 1) {
        Application::logStream() << "Building epilog and prolog for the loop."
                                 << std::endl;
        std::cerr << "rm.smallestCycle: " << rm.smallestCycle() << std::endl;
        std::cerr << "end cycle: " << endCycle << std::endl;
    }
 
    int ii = rm.initiationInterval();
    if (Application::verboseLevel() > 1) {
        Application::logStream() << "Investigate nodes. ii: " << ii
                                 << std::endl;
    }
 
    // resolve how many times loop overlaps
    int overlap_count;
    if (endCycle != -1) {
        overlap_count = ((endCycle - rm.smallestCycle()) / ii);
    } else {
        overlap_count = ddg.largestCycle() / ii;
    }
 
    TTAProgram::Move* jumpMove = NULL;
    if (overlap_count > 0) {
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "Building prolog and epilog..... "
                << " Overlapcount: " << overlap_count << std::endl;
        }
 
        DataDependenceGraph* rootDDG = static_cast<DataDependenceGraph*>(
            ddg.rootGraph());
 
        // make room for moves of prolog and epilog
        TTAProgram::BasicBlock *prolog =
            new TTAProgram::BasicBlock(loopBBN.originalStartAddress());
        BasicBlockNode *prologNode = new BasicBlockNode(*prolog, true, true,
            loopBBN.originalStartAddress(), false);
 
        TTAProgram::BasicBlock *epilog = NULL;
        BasicBlockNode* epilogNode = NULL;
        if (createEpilog) {
            epilog =
                new TTAProgram::BasicBlock(loopBBN.originalStartAddress());
            epilogNode = new BasicBlockNode(
                *epilog, true, true, loopBBN.originalStartAddress(), false);
        }
        for (int i = 0; i < overlap_count * ii; i++) {
            prolog->add(new TTAProgram::Instruction());
            if (createEpilog) {
                epilog->add(new TTAProgram::Instruction());
            }
        }
 
        // scan for long immediates. these can be copied to both
        // prolog and epilog.
        for (int j = 0; j < overlap_count; j++) {
            for (int i = 0; i < ii; i++) {
                TTAProgram::Instruction* ins = rm.instruction(i);
                for (int k = 0; k < ins->immediateCount(); k++) {
                    auto newImm = ins->immediate(k).copy();
                    auto newImm2 = ins->immediate(k).copy();
                    prolog->instructionAtIndex(i+j*ii).addImmediate(newImm);
                    if (createEpilog) {
                        epilog->instructionAtIndex(i+j*ii).addImmediate(newImm2);
                    }
                }
            }
        }
        int newZero = endCycle + 1  - (ii * (1 + overlap_count));
        for (int i = 0 ; i < overlap_count; i++) {
            for (int j = 0; j < ddg.nodeCount(); j++) {
                MoveNode& n = ddg.node(j);
 
                // ignore jump
                if (n.move().isControlFlowMove()) {
                    jumpMove = &n.move();
                    continue;
                }
 
                int cycle;
                if (endCycle != -1) {
                    cycle = n.cycle() - newZero;
                } else {
                    cycle = n.cycle();
                }
                int round = cycle / ii;
                int place = cycle % ii;
 
                MoveNode* nodeCopy;
                if (createEpilog || round == 0) {
                    nodeCopy = n.copy();
                    nodeCopy->move().setGuard(NULL);
 
                    if (endCycle != -1) {
                        nodeCopy->setCycle(place + newZero);
                    } else {
                        nodeCopy->setCycle(place);
                    }
 
                    if (Application::verboseLevel() > 1) {
                        Application::logStream()
                            << "Node cycle: " << cycle
                            << " round: " << round
                            << " place: " << place << " "
                            << n.toString()<< "\t" ;
                    }
                } else {
                    continue;
                }
/*
                if (createEpilog) {
                    if (n.move().isControlFlowMove()) {
                        assert(!n.move().isUnconditional());
                        if (Application::verboseLevel() > 1) {
                            std::cerr << "jumpmove reversing guard at address: "
                                      << &nodeCopy->move()<< std::endl;
                        }
                        nodeCopy->move().setGuard(
                            TTAProgram::CodeGenerator::createInverseGuard(
                                n.move().guard(), &n.move().bus()));
                        // TODO: set jump target to first of epilog
                        nodeCopy->move().setSource(
                            new TTAProgram::TerminalInstructionReference(
                                cfg.instructionReferenceManager().createReference(
                                    epilog->instructionAtIndex(0))));
                    }
                }
*/
                // select if node should go to prolog or epilog
                if (round <= i) {
                    prolog->instructionAtIndex(
                        (i*ii)+place).addMove(nodeCopy->movePtr());
                    if (Application::verboseLevel() > 1) {
                        Application::logStream() << " to prolog" << std::endl;
                    }
                    rootDDG->addNode(*nodeCopy, *prologNode);
                    rootDDG->copyExternalInEdges(*nodeCopy, n);
                    rootDDG->copyExternalOutEdges(*nodeCopy, n);
 
                } else {
                    if (createEpilog) {
                        epilog->instructionAtIndex(
                            (i*ii)+place).addMove(nodeCopy->movePtr());
                        if (Application::verboseLevel() > 1) {
                            Application::logStream() << " to epilog" << std::endl;
                        }
                        rootDDG->addNode(*nodeCopy, *epilogNode);
                        rootDDG->copyExternalInEdges(*nodeCopy, n);
                        rootDDG->copyExternalOutEdges(*nodeCopy, n);
                    }
                }
            }
        }
        assert(jumpMove != NULL);
 
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "Disassembly of prolog" << std::endl <<
                prolog->disassembly() << std::endl;
            if (createEpilog) {
                Application::logStream()
                    << "Disassembly of epilog" << std::endl <<
                    epilog->disassembly() << std::endl;
            }
        }
 
        if (optimizeProlog(*prolog)) {
            if (Application::verboseLevel() > 1) {
                Application::logStream()
                    << "Disassembly of optimized prolog" << std::endl <<
                    prolog->disassembly() << std::endl;
            }
            addPrologIntoCfg(cfg, *prologNode, loopBBN);
        } else {
            delete prologNode;
        }
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "Prolog optimized."
                << std::endl;
        }
        if (createEpilog) {
            if (optimizeEpilog(*epilog)) {
                if (Application::verboseLevel() > 1) {
                    Application::logStream()
                        << "Disassembly of optimized epilog" << std::endl <<
                        epilog->disassembly() << std::endl;
                }
                addEpilogIntoCfg(cfg, *epilogNode, loopBBN);
            } else {
                delete epilogNode; // TODO: what about the BB?
            }
            if (Application::verboseLevel() > 1) {
                Application::logStream()
                    << "Epilog optimized."
                    << std::endl;
            }
        }
    } else {
        if (Application::verboseLevel() > 1) {
            Application::logStream()
                << "No overlapping instructions.No need for prolog or epilog."
                << "Should have used normal scheduler."
                << std::endl;
        }
    }
 
    return overlap_count;
}

References TTAProgram::CodeSnippet::add(), addEpilogIntoCfg(), TTAProgram::Instruction::addImmediate(), TTAProgram::Instruction::addMove(), DataDependenceGraph::addNode(), addPrologIntoCfg(), assert, MoveNode::copy(), TTAProgram::Immediate::copy(), DataDependenceGraph::copyExternalInEdges(), DataDependenceGraph::copyExternalOutEdges(), MoveNode::cycle(), TTAProgram::CodeSnippet::disassembly(), TTAProgram::Instruction::immediate(), TTAProgram::Instruction::immediateCount(), SimpleResourceManager::initiationInterval(), SimpleResourceManager::instruction(), TTAProgram::CodeSnippet::instructionAtIndex(), TTAProgram::Move::isControlFlowMove(), DataDependenceGraph::largestCycle(), Application::logStream(), MoveNode::move(), MoveNode::movePtr(), BoostGraph< GraphNode, GraphEdge >::node(), BoostGraph< GraphNode, GraphEdge >::nodeCount(), optimizeEpilog(), optimizeProlog(), BasicBlockNode::originalStartAddress(), BoostGraph< GraphNode, GraphEdge >::rootGraph(), MoveNode::setCycle(), TTAProgram::Move::setGuard(), SimpleResourceManager::smallestCycle(), MoveNode::toString(), and Application::verboseLevel().

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moveJumpDestination()

void LoopPrologAndEpilogBuilder::moveJumpDestination ( TTAProgram::InstructionReferenceManager &  irm, BasicBlockNode &  tail, BasicBlockNode &  dst, ControlFlowEdge &  jumpEdge  )

private

Definition at line 63 of file LoopPrologAndEpilogBuilder.cc.

                               {
    TTAProgram::BasicBlock& tailBB = tail.basicBlock();
 
    auto predicate = jumpEdge.edgePredicate();
    std::pair<int, TTAProgram::Move*> jumpData =
        CopyingDelaySlotFiller::findJump(tailBB, &predicate);
 
    std::pair<TTAProgram::Move*, std::shared_ptr<TTAProgram::Immediate> >
        jumpAddressData;
 
    // should be the same
    int jumpIndex = jumpData.first;
    TTAProgram::Move* jumpMove = jumpData.second;
    if (jumpMove == NULL) {
        abortWithError("incoming jump not found");
    }
 
    TTAProgram::InstructionReference ir = irm.createReference(
        dst.basicBlock().instructionAtIndex(
            dst.basicBlock().skippedFirstInstructions()));
 
    if (!jumpMove->source().isInstructionAddress()) {
        // address comes from LIMM, search the write to limm reg.
        jumpAddressData =
            CopyingDelaySlotFiller::findJumpImmediate(
                jumpIndex, *jumpMove, irm);
        if (jumpAddressData.first == NULL &&
            jumpAddressData.second == NULL) {
            //Imm source not found, aborting
            abortWithError("Unknown immediate contains jump address");
            return;
        }
        if (jumpAddressData.first != NULL) {
            jumpAddressData.first->setSource(
                new TTAProgram::TerminalInstructionReference(ir));
        } else {
            jumpAddressData.second->setValue(
                new TTAProgram::TerminalInstructionReference(ir));
        }
    } else {
        jumpMove->source().setInstructionReference(ir);
    }
}

References abortWithError, BasicBlockNode::basicBlock(), TTAProgram::InstructionReferenceManager::createReference(), ControlFlowEdge::edgePredicate(), CopyingDelaySlotFiller::findJump(), CopyingDelaySlotFiller::findJumpImmediate(), TTAProgram::CodeSnippet::instructionAtIndex(), TTAProgram::Terminal::isInstructionAddress(), TTAProgram::Terminal::setInstructionReference(), TTAProgram::BasicBlock::skippedFirstInstructions(), and TTAProgram::Move::source().

Referenced by addPrologIntoCfg().

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optimizeEpilog()

bool LoopPrologAndEpilogBuilder::optimizeEpilog ( TTAProgram::BasicBlock &  epilog )

private

Definition at line 575 of file LoopPrologAndEpilogBuilder.cc.

                                                                       {
 
    if (epilog.instructionCount() == 0) {
        return false;
    }
 
    for (int i = epilog.instructionCount() -1 ; i >= 0 ; i--) {
        TTAProgram::Instruction& ins = epilog.instructionAtIndex(i);
        // check for moves is enough. no imms after moves.
        if (ins.moveCount() > 0) {
            break;
        } else {
            // empty? leave one ins behind just for
            if (i == 0) {
                return false;
            }
            assert(i!= 0);
            epilog.remove(ins);
            delete &ins;
        }
    }
    return true;
}

References assert, TTAProgram::CodeSnippet::instructionAtIndex(), TTAProgram::CodeSnippet::instructionCount(), TTAProgram::Instruction::moveCount(), and TTAProgram::CodeSnippet::remove().

Referenced by addEpilogFromRM(), and build().

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optimizeProlog()

bool LoopPrologAndEpilogBuilder::optimizeProlog ( TTAProgram::BasicBlock &  prolog )

private

Definition at line 492 of file LoopPrologAndEpilogBuilder.cc.

                                                                       {
 
    if (prolog.instructionCount() == 0) {
        return false;
    }
    // optimize away immediate values not used
    for (int i = 0; i < prolog.instructionCount() ;i++) {
        TTAProgram::Instruction& ins = prolog.instructionAtIndex(i);
        for (int j = 0; j < ins.immediateCount(); j++) {
            bool used = false;
            bool overwritten = false;
            TTAProgram::Immediate& imm = ins.immediate(j);
            const TTAProgram::Terminal& t = imm.destination();
            const TTAProgram::Terminal& dst = imm.destination();
            const TTAMachine::ImmediateUnit& immu = dst.immediateUnit();
            for (int k = i + immu.latency() ;
                 k  < prolog.instructionCount() &&
                     !used && !overwritten; k++) {
 
                TTAProgram::Instruction& ins2 = prolog.instructionAtIndex(k);
                // if immu has latency 0, check immediate before moves.
                if (immu.latency() == 0 && k > i) {
                    for (int l = 0; l < ins2.immediateCount(); l++) {
                        const TTAProgram::Immediate& imm2 = ins2.immediate(l);
                        const TTAProgram::Terminal& t2 = imm2.destination();
                        if (&t2.immediateUnit() == & t.immediateUnit() &&
                            t2.index() == t.index()) {
                            overwritten = true;
                            break;
                        }
                    }
                }
 
                for (int l = 0; l < ins2.moveCount(); l++) {
                    const TTAProgram::Move& m = ins2.move(l);
                    const TTAProgram::Terminal& t2 = m.source();
                    if (t2.isImmediateRegister() &&
                        &t2.immediateUnit() == &dst.immediateUnit() &&
                        t2.index() == dst.index()) {
                        used = true;
                        break;
                    }
                }
                // if immu has latency 1, check moves before imms
                if (immu.latency() == 1) {
                    for (int l = 0; l < ins2.immediateCount(); l++) {
                        const TTAProgram::Immediate& imm2 = ins2.immediate(l);
                        const TTAProgram::Terminal& t2 = imm2.destination();
                        if (&t2.immediateUnit() == & t.immediateUnit() &&
                            t2.index() == t.index()) {
                            overwritten = true;
                            break;
                        }
                    }
                }
            }
            if (!used && overwritten) {
                ins.removeImmediate(imm);
            }
        }
    }
    for (int i = 0; i <= prolog.instructionCount() -1 ;i++) {
        TTAProgram::Instruction& ins = prolog.instructionAtIndex(i);
        // check for moves is enough. no imms after moves.
        if (ins.moveCount() > 0 || ins.immediateCount() > 0) {
            break;
        } else {
            // empty? leave one ins behind just for
            if (i == prolog.instructionCount() - 1) {
                return false;
            }
            prolog.remove(ins);
            delete &ins;
            // We removed current instruction, there shell be new current
            // instruction once we increse i at beginning of the loop.
            i--;
        }
    }
    return true;
}

References TTAProgram::Immediate::destination(), TTAProgram::Instruction::immediate(), TTAProgram::Instruction::immediateCount(), TTAProgram::Terminal::immediateUnit(), TTAProgram::Terminal::index(), TTAProgram::CodeSnippet::instructionAtIndex(), TTAProgram::CodeSnippet::instructionCount(), TTAProgram::Terminal::isImmediateRegister(), TTAMachine::ImmediateUnit::latency(), TTAProgram::Instruction::move(), TTAProgram::Instruction::moveCount(), TTAProgram::CodeSnippet::remove(), TTAProgram::Instruction::removeImmediate(), and TTAProgram::Move::source().

Referenced by addPrologFromRM(), and build().

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---

The documentation for this class was generated from the following files:

• LoopPrologAndEpilogBuilder.hh
• LoopPrologAndEpilogBuilder.cc