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Public Member Functions | Private Member Functions | Private Attributes | List of all members
MachineStateBuilder Class Reference

#include <MachineStateBuilder.hh>

Collaboration diagram for MachineStateBuilder:
Collaboration graph

Public Member Functions

 MachineStateBuilder (bool detailedSimulationModel=false)
 
virtual ~MachineStateBuilder ()
 
MachineStatebuild (const TTAMachine::Machine &machine, MemorySystem &memSys)
 
MachineStatebuild (const TTAMachine::Machine &machine, MemorySystem &memSys, FUConflictDetectorIndex &detectors, bool throwWhenConflict=true)
 
MachineStatebuild (const TTAMachine::Machine &machine, MemorySystem &memSys, StateLocator &locator)
 

Private Member Functions

 MachineStateBuilder (const MachineStateBuilder &)
 Copying not allowed.
 
MachineStateBuilderoperator= (const MachineStateBuilder &)
 Assignment not allowed.
 
MachineStatebuildMachineState (const TTAMachine::Machine &machine, MemorySystem &memSys, StateLocator &locator)
 
void addPortToFU (MachineState *machineState, TTAMachine::BaseFUPort *port, FUState *state, TTAMachine::FunctionUnit *fu, StateLocator &locator)
 
void addPortToFU (MachineState *machineState, TTAMachine::BaseFUPort *port, FUState *state, TTAMachine::FunctionUnit *fu, StateLocator &locator, SimValue &sharedRegister)
 
void bindPortsToOperands (OperationExecutor &executor, TTAMachine::HWOperation &hwOperation, MachineState &machineState, FUState &state, TTAMachine::FunctionUnit &unit)
 
void addVirtualOpcodeSettingPortsToFU (MachineState &machineState, FUState &state, TTAMachine::FunctionUnit &unit)
 

Private Attributes

FUConflictDetectorIndexdetectors_
 The FU resource conflict detectors. They are needed while building the machine state model.
 
bool throwWhenConflict_
 True in case the built model should throw an exception in case of a resource conflict.
 
bool detailedSimulationModel_
 Set to true in case should build a detailed model which simulates FU stages, possibly with an external system-level model.
 

Detailed Description

Builds MachineState from Machine Object Model.

Definition at line 62 of file MachineStateBuilder.hh.

Constructor & Destructor Documentation

◆ MachineStateBuilder() [1/2]

MachineStateBuilder::MachineStateBuilder ( bool  detailedSimulationModel = false)

Constructor.

Definition at line 84 of file MachineStateBuilder.cc.

84 :
85 throwWhenConflict_(true),
86 detailedSimulationModel_(detailedSimulationModel) {
87}
bool detailedSimulationModel_
Set to true in case should build a detailed model which simulates FU stages, possibly with an externa...
bool throwWhenConflict_
True in case the built model should throw an exception in case of a resource conflict.

◆ ~MachineStateBuilder()

MachineStateBuilder::~MachineStateBuilder ( )
virtual

Destructor.

Definition at line 92 of file MachineStateBuilder.cc.

92 {
93}

◆ MachineStateBuilder() [2/2]

MachineStateBuilder::MachineStateBuilder ( const MachineStateBuilder )
private

Copying not allowed.

Member Function Documentation

◆ addPortToFU() [1/2]

void MachineStateBuilder::addPortToFU ( MachineState machineState,
TTAMachine::BaseFUPort port,
FUState state,
TTAMachine::FunctionUnit fu,
StateLocator locator 
)
private

Adds a port that does not share a register to FU.

Parameters
machineStateMachine state which is built.
portPort to be added.
stateFUState in which port is added.
fuFU of which FUState is build from.
locatorStateLocator.

Definition at line 644 of file MachineStateBuilder.cc.

649 {
651 machineState, port, state, unit, locator, NullSimValue::instance());
652}
void addPortToFU(MachineState *machineState, TTAMachine::BaseFUPort *port, FUState *state, TTAMachine::FunctionUnit *fu, StateLocator &locator)
static SimValue & instance()
Definition SimValue.cc:1642

References addPortToFU(), and NullSimValue::instance().

Referenced by addPortToFU(), and buildMachineState().

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◆ addPortToFU() [2/2]

void MachineStateBuilder::addPortToFU ( MachineState machineState,
TTAMachine::BaseFUPort port,
FUState state,
TTAMachine::FunctionUnit fu,
StateLocator locator,
SimValue sharedRegister 
)
private

Adds a port that shares a register to FU.

Parameters
machineStateMachine state which is built.
portPort to be added.
stateFUState in which port is added.
fuFU of which FUState is build from.
locatorStateLocator.
sharedRegisterThe register the FUPort shares, if any. If this is set to NullSimValue then a new register (SimValue) is created for the FUPort.

Definition at line 510 of file MachineStateBuilder.cc.

516 {
517
518 bool inputPort = false;
519 // a shortcut for figuring whether the port shares a register (in practice,
520 // connected to the return address register)
521 const bool sharesRegister = (&sharedRegister != &NullSimValue::instance());
522
523 // figure out the direction of the port
524 if (port->inputSocket() != NULL) {
525 inputPort = true;
526 } else if (port->outputSocket() != NULL) {
527 inputPort = false;
528 } else {
529 // Find out the direction of the port using operation<->port
530 // connections. This way we can simulate also individual function
531 // units which are not connected to any socket.
532 const TTAMachine::FunctionUnit& parentFU = *port->parentUnit();
533
534 // find out an operation that is connected to this port
535 bool operationBindingFound = false;
536 const TTAMachine::FUPort* fuPort =
537 dynamic_cast<TTAMachine::FUPort*>(port);
538 for (int i = 0; fuPort != NULL && !operationBindingFound &&
539 i < parentFU.operationCount(); ++i) {
540 const TTAMachine::HWOperation& operation = *parentFU.operation(i);
541 if (!operation.isBound(*fuPort))
542 continue;
543
544 const TTAMachine::ExecutionPipeline* pipe = operation.pipeline();
545
546 if (pipe == NULL)
547 continue;
548 // find out if there's a R/W pipeline component connected to
549 // the port
550 for (int cycle = 0; cycle < pipe->latency(); ++cycle) {
551 if (pipe->isPortRead(*fuPort, cycle)) {
552 inputPort = true;
553 operationBindingFound = true;
554 break;
555 } else if (pipe->isPortWritten(*fuPort, cycle)) {
556 inputPort = false;
557 operationBindingFound = true;
558 break;
559 } else {
560 // no pipeline connection to this port at this cycle
561 continue;
562 }
563 }
564 }
565
566 if (!operationBindingFound) {
568 << "warning: Cannot determine the direction of port "
569 << port->parentUnit()->name() + "." + port->name()
570 << ", omitting it from the simulation model."
571 << std::endl;
572 return;
573 }
574 }
575
576 if (inputPort) {
577 if (port->isOpcodeSetting()) {
578
579 TriggeringInputPortState* triggerPort = NULL;
580 if (sharesRegister) {
581 triggerPort =
582 new TriggeringInputPortState(*state, sharedRegister);
583 } else {
584 triggerPort =
585 new TriggeringInputPortState(*state, port->width());
586 }
587
588 state->addInputPortState(*triggerPort);
589 machineState->addPortState(
590 triggerPort, port->name(), port->parentUnit()->name());
591 locator.addState(*port, *triggerPort);
592
593 } else if (port->isTriggering()) {
594
595 TriggeringInputPortState* input = NULL;
596 if (sharesRegister) {
597 input = new TriggeringInputPortState(*state, sharedRegister);
598 } else {
599 input = new TriggeringInputPortState(*state, port->width());
600 }
601
602 machineState->addPortState(
603 input, port->name(), port->parentUnit()->name());
604 state->addInputPortState(*input);
605 locator.addState(*port, *input);
606 } else {
607 InputPortState* input = NULL;
608 if (sharesRegister) {
609 input = new InputPortState(*state, sharedRegister);
610 } else {
611 input = new InputPortState(*state, port->width());
612 }
613 machineState->addPortState(
614 input, port->name(), port->parentUnit()->name());
615 state->addInputPortState(*input);
616 locator.addState(*port, *input);
617 }
618 } else {
619 // port is an output port
620
621 OutputPortState* output = NULL;
622 if (sharesRegister) {
623 output = new OutputPortState(*state, sharedRegister);
624 } else {
625 output = new OutputPortState(*state, port->width());
626 }
627 machineState->addPortState(
628 output, port->name(), port->parentUnit()->name());
629 state->addOutputPortState(*output);
630 locator.addState(*port, *output);
631 }
632}
static std::ostream & warningStream()
virtual void addOutputPortState(PortState &port)
Definition FUState.cc:221
virtual void addInputPortState(PortState &port)
Definition FUState.cc:211
void addPortState(PortState *state, const std::string &name, const std::string &fuName)
void addState(const TTAMachine::MachinePart &momComponent, StateData &state)
FunctionUnit * parentUnit() const
Definition BaseFUPort.cc:96
virtual int width() const
virtual bool isOpcodeSetting() const =0
virtual bool isTriggering() const =0
virtual TCEString name() const
bool isPortWritten(const FUPort &port, int cycle) const
bool isPortRead(const FUPort &port, int cycle) const
virtual HWOperation * operation(const std::string &name) const
virtual int operationCount() const
ExecutionPipeline * pipeline() const
bool isBound(const FUPort &port) const
virtual Socket * outputSocket() const
Definition Port.cc:281
virtual Socket * inputSocket() const
Definition Port.cc:261
virtual std::string name() const
Definition Port.cc:141

References FUState::addInputPortState(), FUState::addOutputPortState(), MachineState::addPortState(), StateLocator::addState(), TTAMachine::Port::inputSocket(), NullSimValue::instance(), TTAMachine::HWOperation::isBound(), TTAMachine::BaseFUPort::isOpcodeSetting(), TTAMachine::ExecutionPipeline::isPortRead(), TTAMachine::ExecutionPipeline::isPortWritten(), TTAMachine::BaseFUPort::isTriggering(), TTAMachine::ExecutionPipeline::latency(), TTAMachine::Component::name(), TTAMachine::Port::name(), TTAMachine::FunctionUnit::operation(), TTAMachine::FunctionUnit::operationCount(), TTAMachine::Port::outputSocket(), TTAMachine::BaseFUPort::parentUnit(), TTAMachine::HWOperation::pipeline(), Application::warningStream(), and TTAMachine::BaseFUPort::width().

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◆ addVirtualOpcodeSettingPortsToFU()

void MachineStateBuilder::addVirtualOpcodeSettingPortsToFU ( MachineState machineState,
FUState state,
TTAMachine::FunctionUnit unit 
)
private

Adds the virtual opcode-setting ports to the FU.

Expects that the FU is otherwise completely built.

Parameters
machineStateThe machine state to use.
stateThe FUState to add the ports.
unitThe static function unit data from MOM.
Todo:
Improve this and change the naming to alu.add.p1, or save the virtual ports to different index!

Definition at line 368 of file MachineStateBuilder.cc.

371 {
372 for (int i = 0; i < unit.portCount(); i++) {
373 BaseFUPort& port = *unit.port(i);
374
375 if (port.isOpcodeSetting()) {
376
377 PortState* p = &machineState.portState(port.name(), unit.name());
379
380 TriggeringInputPortState* triggerPort =
381 dynamic_cast<TriggeringInputPortState*>(p);
382
383 if (triggerPort == NULL) {
384 throw IllegalMachine(
385 __FILE__, __LINE__, __func__,
386 std::string("The opcode setting port ") + port.name() +
387 " is not triggering.");
388 }
389
390 // create a virtual port for all the opcodes that can be set
391 // through the port
392 for (int j = 0; j < unit.operationCount(); j++) {
393
394 HWOperation& hwOp = *unit.operation(j);
396 Operation* operation = NULL;
397 try {
398 operation = &pool.operation(hwOp.name().c_str());
399 } catch (const DynamicLibraryException& e) {
400 throw IllegalMachine(
401 __FILE__, __LINE__, __func__, e.errorMessage());
402 }
403
404 if (operation->isNull()) {
405 throw IllegalMachine(
406 __FILE__, __LINE__, __func__,
407 (boost::format(
408 "Operation '%s' not found in OSAL.") %
409 hwOp.name()).str());
410 }
411
412 // add executor for the operation
413 OperationExecutor* executor = NULL;
414 GCUState* gcu = dynamic_cast<GCUState*>(&state);
415 if (gcu != NULL) {
416 executor = new TransportPipeline(*gcu);
417 } else {
418 if (hwOp.latency() == 0) {
419 throw IllegalMachine(
420 __FILE__, __LINE__, __func__,
421 std::string("Operation ") + hwOp.name() + " in " +
422 unit.name() + " has latency of 0, which is not " +
423 "supported by TCE.");
424 }
425
426 bool conflictDetection = false;
427 if (detectors_ != NULL && unit.needsConflictDetection()) {
428 FUConflictDetectorIndex::iterator detectorI =
429 detectors_->find(unit.name());
430
431 if (detectorI != detectors_->end()) {
432 conflictDetection = true;
433
435 *(*detectorI).second;
436 // the FU has conflict detection enabled, always
437 // create a new ConflictDetectingOperationExecutor
438 // for all opcodes.
440 detector, detector.operationID(hwOp.name()),
441 state, hwOp, throwWhenConflict_);
442 }
443 }
444
445 if (!conflictDetection) {
446 bool multiLatencyOp = false;
447 const int totalLatency = hwOp.latency();
448 for (int i = operation->numberOfInputs() + 1;
449 i <= operation->numberOfInputs() +
450 operation->numberOfOutputs(); ++i) {
451 if (hwOp.latency(i) < totalLatency) {
452 multiLatencyOp = true;
453 break;
454 }
455 }
456
457 if (multiLatencyOp || detailedSimulationModel_) {
458 executor = new MultiLatencyOperationExecutor(
459 state, hwOp);
460 } else if (totalLatency == 1) {
461 executor = new OneCycleOperationExecutor(state);
462 } else {
463 executor =
465 totalLatency, state);
466 }
467 }
468 }
469
471 *executor, hwOp, machineState, state, unit);
472
473 state.addOperationExecutor(*executor, *operation);
474 machineState.addOperationExecutor(executor);
475
476 // virtual ports are put to the index with names like
477 // p1.add
478 /// @todo Improve this and change the naming to alu.add.p1,
479 /// or save the virtual ports to different index!
480 string name =
481 port.name() + "." +
482 StringTools::stringToLower(operation->name());
483 OperationExecutor* finalExecutor =
484 state.executor(*operation);
485 assert(executor != NULL);
488 *operation, *finalExecutor, state, *triggerPort);
489 state.addInputPortState(*opcodePort);
490 machineState.addPortState(
491 opcodePort, name, port.parentUnit()->name());
492 }
493 }
494 }
495}
#define __func__
#define assert(condition)
std::string errorMessage() const
Definition Exception.cc:123
virtual OperationID operationID(const TCEString &operationName) const
virtual void addOperationExecutor(OperationExecutor &opExec, Operation &op)
Definition FUState.cc:232
virtual OperationExecutor * executor(Operation &op)
Definition FUState.cc:358
FUConflictDetectorIndex * detectors_
The FU resource conflict detectors. They are needed while building the machine state model.
void bindPortsToOperands(OperationExecutor &executor, TTAMachine::HWOperation &hwOperation, MachineState &machineState, FUState &state, TTAMachine::FunctionUnit &unit)
PortState & portState(const std::string &portName, const std::string &fuName)
void addOperationExecutor(OperationExecutor *executor)
static NullPortState & instance()
Definition PortState.cc:96
virtual TCEString name() const
Definition Operation.cc:93
bool isNull() const
virtual int numberOfInputs() const
Definition Operation.cc:192
virtual int numberOfOutputs() const
Definition Operation.cc:202
static OperationPool & operationPool()
static std::string stringToLower(const std::string &source)
bool needsConflictDetection() const
virtual BaseFUPort * port(const std::string &name) const
const std::string & name() const
virtual int portCount() const
Definition Unit.cc:135
std::unique_ptr< OperationPool > pool

References __func__, FUState::addInputPortState(), FUState::addOperationExecutor(), MachineState::addOperationExecutor(), MachineState::addPortState(), assert, bindPortsToOperands(), detailedSimulationModel_, detectors_, Exception::errorMessage(), FUState::executor(), NullPortState::instance(), Operation::isNull(), TTAMachine::BaseFUPort::isOpcodeSetting(), TTAMachine::HWOperation::latency(), TTAMachine::HWOperation::name(), TTAMachine::Component::name(), TTAMachine::Port::name(), Operation::name(), TTAMachine::FunctionUnit::needsConflictDetection(), Operation::numberOfInputs(), Operation::numberOfOutputs(), TTAMachine::FunctionUnit::operation(), TTAMachine::FunctionUnit::operationCount(), FUResourceConflictDetector::operationID(), SimulatorToolbox::operationPool(), TTAMachine::BaseFUPort::parentUnit(), TTAMachine::FunctionUnit::port(), TTAMachine::Unit::portCount(), MachineState::portState(), StringTools::stringToLower(), and throwWhenConflict_.

Referenced by buildMachineState().

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◆ bindPortsToOperands()

void MachineStateBuilder::bindPortsToOperands ( OperationExecutor executor,
TTAMachine::HWOperation hwOperation,
MachineState machineState,
FUState state,
TTAMachine::FunctionUnit unit 
)
private

Binds ports to operands.

Operands are bound for OperationExecutor which is not yet inserted to the machine.

Parameters
executorOperationExecutor to bind the ports for.
machineStateMachineState to be built.
stateFUState of which ports are bound.
unitFunctionUnit that owns the ports that are bound.
Exceptions
IllegalMachineIf binding fails.

Definition at line 667 of file MachineStateBuilder.cc.

669 {
671 Operation& op = pool.operation(hwOperation.name().c_str());
672
673 if (&op == &NullOperation::instance()) {
674 const string msg =
676 Texts::TXT_OPERATION_X_NOT_FOUND) % hwOperation.name()).str();
677 throw IllegalMachine(__FILE__, __LINE__, __func__, msg);
678 }
679
680 const int operandCount = op.numberOfInputs() + op.numberOfOutputs();
681 for (int j = 1; j <= operandCount; j++) {
682
683 FUPort* port = hwOperation.port(j);
684 if (port == NULL) {
685 // unused operand
686 continue;
687 }
688 PortState& portState =
689 machineState.portState(port->name(), unit.name());
690 try {
691 executor.addBinding(j, portState);
692 } catch (const Exception& e) {
693 string msg = "Problems while building machine state: " +
694 e.errorMessage();
695 throw IllegalMachine(__FILE__, __LINE__, __func__, msg);
696 }
697 }
698}
static NullOperation & instance()
void addBinding(int io, PortState &port)
static SimulatorTextGenerator & textGenerator()
virtual FUPort * port(int operand) const
virtual boost::format text(int textId)

References __func__, OperationExecutor::addBinding(), Exception::errorMessage(), NullOperation::instance(), TTAMachine::HWOperation::name(), TTAMachine::Component::name(), TTAMachine::Port::name(), Operation::numberOfInputs(), Operation::numberOfOutputs(), SimulatorToolbox::operationPool(), TTAMachine::HWOperation::port(), MachineState::portState(), Texts::TextGenerator::text(), SimulatorToolbox::textGenerator(), and Texts::TXT_OPERATION_X_NOT_FOUND.

Referenced by addVirtualOpcodeSettingPortsToFU().

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◆ build() [1/3]

MachineState * MachineStateBuilder::build ( const TTAMachine::Machine machine,
MemorySystem memSys 
)

Builds machine state from given machine.

Parameters
machineThe machine of which machine state is built from.
memSysMemory system instance.
Returns
The created machine state.
Exceptions
IllegalMachineIf machine state building fails.

Definition at line 104 of file MachineStateBuilder.cc.

106 {
107
108 StateLocator locator;
109 detectors_ = NULL;
110 return buildMachineState(machine, memSys, locator);
111}
TTAMachine::Machine * machine
the architecture definition of the estimated processor
MachineState * buildMachineState(const TTAMachine::Machine &machine, MemorySystem &memSys, StateLocator &locator)

References buildMachineState(), detectors_, and machine.

Referenced by FUTestbenchGenerator::createMachineState(), RFTestbenchGenerator::createMachineState(), and SimulationController::SimulationController().

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◆ build() [2/3]

MachineState * MachineStateBuilder::build ( const TTAMachine::Machine machine,
MemorySystem memSys,
FUConflictDetectorIndex detectors,
bool  throwWhenConflict = true 
)

Builds machine state from given machine.

This method allows giving an index of FU resource conflict detectors to create a model that detects FU resource conflicts.

Parameters
machineThe machine of which machine state is built from.
memSysMemory system instance.
detectorsThe FU resource conflict detectors.
throwWhenConflictBuilds a model that throws an exception in case of resource conflict is detected.
Returns
The created machine state.
Exceptions
IllegalMachineIf machine state building fails.

Definition at line 128 of file MachineStateBuilder.cc.

132 {
133
134 StateLocator locator;
135 detectors_ = &detectors;
136 throwWhenConflict_ = throwWhenConflict;
137 return buildMachineState(machine, memSys, locator);
138}

References buildMachineState(), detectors_, machine, and throwWhenConflict_.

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◆ build() [3/3]

MachineState * MachineStateBuilder::build ( const TTAMachine::Machine machine,
MemorySystem memSys,
StateLocator locator 
)

Builds machine state from given machine.

Parameters
machineMachine of which machine state is build from.
memSysMemory system.
locatorIndexes states with components as keys.
Returns
The created machine state instance.
Exceptions
IllegalMachineIf machine state building fails.

Definition at line 150 of file MachineStateBuilder.cc.

153 {
154 detectors_ = NULL;
155 return buildMachineState(machine, memSys, locator);
156}

References buildMachineState(), detectors_, and machine.

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◆ buildMachineState()

MachineState * MachineStateBuilder::buildMachineState ( const TTAMachine::Machine machine,
MemorySystem memSys,
StateLocator locator 
)
private

Builds MachineState from given Machine.

Parameters
machineMachine.
memSysMemory system.
locatorState locator.
Returns
The created MachineState.
Exceptions
IllegalMachineIf machine state building fails.
Todo:
This assumes that natural word width of GCU is 4 MAUs!

Definition at line 168 of file MachineStateBuilder.cc.

171 {
172
173 MachineState* machineState = new MachineState();
174
175 int controlUnitGuardLatency = 0;
176 if (machine.controlUnit() != NULL) {
177 ControlUnit* controlUnit = machine.controlUnit();
178 /// @todo This assumes that natural word width of GCU is 4 MAUs!
179 int WordWidthInMAUs = 1;
180
181 GCUState* gcu = new GCUState(
182 (controlUnit->delaySlots() + 1), 4, controlUnit->delaySlots(),
183 WordWidthInMAUs);
184 machineState->addGCUState(gcu);
185 controlUnitGuardLatency = controlUnit->globalGuardLatency();
186
187 for (int i = 0; i < controlUnit->portCount(); i++) {
188 BaseFUPort* port = controlUnit->port(i);
189 if (controlUnit->hasReturnAddressPort() &&
190 dynamic_cast<SpecialRegisterPort*>(port) ==
191 controlUnit->returnAddressPort()) {
192 // return address port shares a register with the RA register
193 // which resides inside the GCU
195 machineState, port, gcu, controlUnit, locator,
196 gcu->returnAddressRegister());
197 } else {
198 addPortToFU(machineState, port, gcu, controlUnit, locator);
199 }
200 }
201 addVirtualOpcodeSettingPortsToFU(*machineState, *gcu, *controlUnit);
202 }
203
205
207 AddressSpaceCheck addressSpaceCheck(pool);
208 MachineCheckResults results;
209 if (!addressSpaceCheck.check(machine, results)) {
210 string msg = "Problems while building machine state: " +
211 results.error(0).second;
212 throw IllegalMachine(__FILE__, __LINE__, __func__, msg) ;
213 }
214
215 for (int i = 0; i < FUs.count(); i++) {
216 FunctionUnit* unit = FUs.item(i);
217 FUState* state = NULL;
218 if (unit->addressSpace() != NULL) {
219 try {
220 MemorySystem::MemoryPtr memory = memSys.memory(*unit->addressSpace());
221 state = new MemoryAccessingFUState(unit->name(), *memory.get());
222 } catch (const Exception& i) {
223 string msg = "Problems building machine state: " +
224 i.errorMessage();
225 throw IllegalMachine(__FILE__, __LINE__, __func__, msg);
226 }
227 } else {
228 state = new FUState(unit->name());
229 }
230 machineState->addFUState(state, unit->name());
231
232 for (int k = 0; k < unit->portCount(); k++) {
233 BaseFUPort* port = unit->port(k);
234 addPortToFU(machineState, port, state, unit, locator);
235 }
236
237 addVirtualOpcodeSettingPortsToFU(*machineState, *state, *unit);
238 }
239
240 Machine::ImmediateUnitNavigator immediateUnits =
242 for (int i = 0; i < immediateUnits.count(); i++) {
243 LongImmediateUnitState* state =
245 immediateUnits.item(i)->numberOfRegisters(),
246 immediateUnits.item(i)->latency(),
247 immediateUnits.item(i)->name(),
248 immediateUnits.item(i)->width(),
249 immediateUnits.item(i)->extensionMode() ==
251
252 machineState->addLongImmediateUnitState(
253 state, immediateUnits.item(i)->name());
254 }
255
257 for (int i = 0; i < registers.count(); i++) {
258 RegisterFile* regFile = registers.item(i);
259 RegisterFileState* state = NULL;
260 state = new RegisterFileState(
261 regFile->numberOfRegisters(), regFile->width(),
262 regFile->zeroRegister());
263 machineState->addRegisterFileState(state, regFile->name());
264 }
265
267 for (int b = 0; b < busses.count(); ++b) {
268 Bus* bus = busses.item(b);
269 BusState* state = new BusState(bus->width());
270 machineState->addBusState(state, bus->name());
271 locator.addState(*bus, *state);
272
273 for (int i = 0; i < bus->guardCount(); ++i) {
274 const Guard* guard = bus->guard(i);
275 assert(guard != NULL);
276
277 const PortGuard* portGuard =
278 dynamic_cast<const PortGuard*>(guard);
279 const RegisterGuard* registerGuard =
280 dynamic_cast<const RegisterGuard*>(guard);
281 const UnconditionalGuard* uncondGuard =
282 dynamic_cast<const UnconditionalGuard*>(guard);
283
284 int guardLatency = controlUnitGuardLatency;
285 ReadableState* targetRegister = NULL;
286 if (portGuard != NULL) {
287
288 const BaseFUPort* thePort =
289 dynamic_cast<const BaseFUPort*>(portGuard->port());
290
291 assert(thePort != NULL);
292
293 PortState& port =
294 machineState->portState(
295 thePort->name(), thePort->parentUnit()->name());
296
297 if (&port == &NullPortState::instance()) {
298 throw IllegalMachine(
299 __FILE__, __LINE__, __func__,
302 str());
303 }
304 targetRegister = &port;
305
306 // 0-cycle guard latency means reading the value directly
307 // from the port.
308 if (guardLatency == 0) {
309 GuardState* guardState =
310 new DirectGuardState(*targetRegister);
311 machineState->addGuardState(guardState, *guard);
312 continue;
313 }
314 } else if (registerGuard != NULL) {
315
316 RegisterFileState& unit =
317 machineState->registerFileState(
318 registerGuard->registerFile()->name());
319
320 if (&unit == &NullRegisterFileState::instance()) {
321 throw IllegalMachine(
322 __FILE__, __LINE__, __func__,
325 ).str());
326 }
327 guardLatency += registerGuard->registerFile()->guardLatency();
328
329 targetRegister =
330 &unit.registerState(registerGuard->registerIndex());
331
332 // Values of registers are written later than guard are evaluated,
333 // so in case of 1-cycle register guard, can use direct guard
334 // without any pipeline.
335 if (guardLatency == 1) {
336 GuardState* guardState =
337 new DirectGuardState(*targetRegister);
338 machineState->addGuardState(guardState, *guard);
339 continue;
340 }
341 } else if (uncondGuard != NULL) {
342 // do not create a state object for unconditional guards,
343 // it makes no sense
344 continue;
345 } else {
346 abortWithError("Unknown guard type.");
347 }
348
349 GuardState* guardState =
350 new GuardState(*targetRegister, guardLatency);
351 machineState->addGuardState(guardState, *guard);
352 }
353 }
354
355 return machineState;
356}
#define abortWithError(message)
SimValue & returnAddressRegister()
Error error(int index) const
void addVirtualOpcodeSettingPortsToFU(MachineState &machineState, FUState &state, TTAMachine::FunctionUnit &unit)
void addRegisterFileState(RegisterFileState *state, const std::string &name)
void addBusState(BusState *state, const std::string &name)
void addFUState(FUState *state, const std::string &name)
void addGuardState(GuardState *state, const TTAMachine::Guard &guard)
RegisterFileState & registerFileState(const std::string &name)
void addGCUState(GCUState *state)
void addLongImmediateUnitState(LongImmediateUnitState *state, const std::string &name)
MemoryPtr memory(const TTAMachine::AddressSpace &as)
boost::shared_ptr< Memory > MemoryPtr
static NullRegisterFileState & instance()
virtual RegisterState & registerState(int index)
virtual int numberOfRegisters() const
virtual int width() const
int width() const
Definition Bus.cc:149
Guard * guard(int index) const
Definition Bus.cc:456
int guardCount() const
Definition Bus.cc:441
SpecialRegisterPort * returnAddressPort() const
bool hasReturnAddressPort() const
int globalGuardLatency() const
virtual AddressSpace * addressSpace() const
ComponentType * item(int index) const
virtual RegisterFileNavigator registerFileNavigator() const
Definition Machine.cc:450
virtual FunctionUnitNavigator functionUnitNavigator() const
Definition Machine.cc:380
virtual ImmediateUnitNavigator immediateUnitNavigator() const
Definition Machine.cc:416
virtual BusNavigator busNavigator() const
Definition Machine.cc:356
virtual ControlUnit * controlUnit() const
Definition Machine.cc:345
@ SIGN
Sign extension.
Definition Machine.hh:82
FUPort * port() const
virtual bool zeroRegister() const
virtual int guardLatency() const
const RegisterFile * registerFile() const
@ TXT_ILLEGAL_PROGRAM_PORT_STATE_NOT_FOUND
Text of the exception thrown when FUPortState could not be found and there is instruction referring t...
@ TXT_ILLEGAL_PROGRAM_RF_STATE_NOT_FOUND
Text of the exception thrown when RegisterFileState could not be found and there is instruction refer...

References __func__, abortWithError, MachineState::addBusState(), MachineState::addFUState(), MachineState::addGCUState(), MachineState::addGuardState(), MachineState::addLongImmediateUnitState(), addPortToFU(), MachineState::addRegisterFileState(), TTAMachine::FunctionUnit::addressSpace(), StateLocator::addState(), addVirtualOpcodeSettingPortsToFU(), assert, TTAMachine::Machine::busNavigator(), AddressSpaceCheck::check(), TTAMachine::Machine::controlUnit(), TTAMachine::Machine::Navigator< ComponentType >::count(), TTAMachine::ControlUnit::delaySlots(), MachineCheckResults::error(), Exception::errorMessage(), TTAMachine::Machine::functionUnitNavigator(), TTAMachine::ControlUnit::globalGuardLatency(), TTAMachine::Bus::guard(), TTAMachine::Bus::guardCount(), TTAMachine::RegisterFile::guardLatency(), TTAMachine::ControlUnit::hasReturnAddressPort(), TTAMachine::Machine::immediateUnitNavigator(), NullPortState::instance(), NullRegisterFileState::instance(), TTAMachine::Machine::Navigator< ComponentType >::item(), machine, MemorySystem::memory(), TTAMachine::Component::name(), TTAMachine::Port::name(), TTAMachine::BaseRegisterFile::numberOfRegisters(), SimulatorToolbox::operationPool(), TTAMachine::BaseFUPort::parentUnit(), TTAMachine::PortGuard::port(), TTAMachine::FunctionUnit::port(), TTAMachine::Unit::portCount(), MachineState::portState(), TTAMachine::RegisterGuard::registerFile(), TTAMachine::Machine::registerFileNavigator(), MachineState::registerFileState(), TTAMachine::RegisterGuard::registerIndex(), RegisterFileState::registerState(), TTAMachine::ControlUnit::returnAddressPort(), GCUState::returnAddressRegister(), TTAMachine::Machine::SIGN, SimulatorToolbox::textGenerator(), Texts::TXT_ILLEGAL_PROGRAM_PORT_STATE_NOT_FOUND, Texts::TXT_ILLEGAL_PROGRAM_RF_STATE_NOT_FOUND, TTAMachine::BaseRegisterFile::width(), TTAMachine::Bus::width(), and TTAMachine::RegisterFile::zeroRegister().

Referenced by build(), build(), and build().

Here is the call graph for this function:

◆ operator=()

MachineStateBuilder & MachineStateBuilder::operator= ( const MachineStateBuilder )
private

Assignment not allowed.

Member Data Documentation

◆ detailedSimulationModel_

bool MachineStateBuilder::detailedSimulationModel_
private

Set to true in case should build a detailed model which simulates FU stages, possibly with an external system-level model.

Definition at line 128 of file MachineStateBuilder.hh.

Referenced by addVirtualOpcodeSettingPortsToFU().

◆ detectors_

FUConflictDetectorIndex* MachineStateBuilder::detectors_
private

The FU resource conflict detectors. They are needed while building the machine state model.

Definition at line 120 of file MachineStateBuilder.hh.

Referenced by addVirtualOpcodeSettingPortsToFU(), build(), build(), and build().

◆ throwWhenConflict_

bool MachineStateBuilder::throwWhenConflict_
private

True in case the built model should throw an exception in case of a resource conflict.

Definition at line 124 of file MachineStateBuilder.hh.

Referenced by addVirtualOpcodeSettingPortsToFU(), and build().


The documentation for this class was generated from the following files: